
NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 25: I2C Interface
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
25-773
Bit [7:1]: SLAVE_ADDR Slave Address
SLAVE_ADDR is not affected by the IIC module hardware. The contents of this
register are irrelevant when IIC module is in a master mode. In the slave mode, the
bits 7:1 must be loaded with the micro controller’s own slave address. These bits
correspond to the 7-bit slave address which will be recognized on the incoming data
stream from the I2C bus. When the slave address is detected and the interface is
enabled, a serial interrupt will be generated.
Bit 0: GEN_CALL_ADDR General Call Address
When this bit is set, the general call address (Slave Address[7:1] on I2C bus = 0x00,
R/W bit on I2C bus = 0) is recognized. If not set, this bit is ignored.
0xC8
Last data byte in
DAT has been
transmitted (AA =
0); ACK has been
received
No STA action
0
Switched to “not addressed” SLV mode; no
recognition of own SLA or general call
address.
No STA action
0
1
Switched to “not addressed” SLV mode;
own SLA will be recognized; general call
address will be recognized if ADR(0) =’1’.
No STA action
1
0
Switched to “not addressed” SLV mode; no
recognition of own SLA or general call
address. A START condition will be
transmitted when the bus becomes free.
No STA action
1
0
1
Switched to “not addressed” SLV mode;
Own SLA will be recognized; general call
address will be recognized if ADR(0) =’1’. A
START condition will be transmitted when
the bus becomes free.
0xF8
No information
available
No DAT action
No IIC_CONTROL action
Wait or proceed with current transfer.
MST—Master
SLV—Slave
REC—Receiver
TRX—Transmitter
SLA—Slave address
W—Write bit
R—Read bit
X—Don’t care bit
Table 6: IIC Registers
Bit
Symbol
Acces
s
Value
Description
Offset 0x04 500C
I2C ADDRESS REGISTER
31:8
Unused
-
Ignore upon read. Write as zeroes.
7:1
SLAVE_ADDR
R/W
0x00
Slave address when in slave mode
0
GEN_CALL_ADDR
R/W
0x0
General call address
0 = Does not generate interrupt if general call address is
detected on the I2C bus.
1= Generates interrupt if general call address is detected.
Table 5: Status Codes …Continued
Status
Code
STA
Bus/Module
Status
Application Software Response
Next Action Taken
To/From DAT
To CON
STA
STO
SI
AA