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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 19: Memory Based Scaler
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
19-590
If the alpha value, after horizontal and vertical processing, is below a xed
threshold (0x80), the sample is replaced by the color key.
Fixed Alpha Insert
The alpha value dened in the Color Key register is inserted, as the fourth
component after horizontal and vertical processing, in the PSU unit (if
CKEY_K2A=1).
2.4.7
Alpha Processing
Alpha processing is only available when the horizontal and vertical lter blocks are
either bypassed or operated in the four-component mode. If the horizontal lter is
used for color space conversion, the alpha information is kept time-aligned with the
other three components.
2.4.8
Video Data Output
After processing the video stream, the MBS can split the video data into one or more
(up to three) different streams. For each stream, there is a memory base address.
There are two line-pitch registers further dening the DMA streams. The number of
streams (planes) is dened by the output-format register. Depending on its value, the
video components get packed into 64-bit words. These words then get buffered and
transferred to the external memory in more effective clusters. A list of the supported
output video formats is shown in
Table 6. Packing of a pixel into 64-bit units is always
done from right to left, while bytes within one pixel unit are ordered according to the
Endian settings (according to the global Endian setting, the Endian bit in the output
format register can invert the setting).
Remark: Table 6 shows location of the first ’pixel unit’ within a 64 bit word in the little
endian mode. The selected endian mode will affect the position of the components
within multi-byte pixel units!
Table 6: Output Pixel Formats
Format
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
0
9 8 7 6 5 4 3 2 1 0
planar YUV or RGB
(4:4:4, 4:2:2 or
4:2:0)
plane #1
plane #2
plane #3
Y8 or R8
U8 or G8
V8 or B8
semi planar YUV
(4:2:2 or 4:2:0)
plane #1
plane #2
Y8 or R8
V8
U8
packed 4/4/4 RGBa
alpha
R4
G4
B4
packed 4/5/3 RGBa
alpha
R4
G5
B3
packed 5/6/5 RGB
R5
G6
B5
packed YUY2 4:2:2
U8 or V8
Y8
packed UYVY 4:2:2
Y8
U8 or V8
packed 888 RGB(a) (alpha)
R8 or Y8
G8 or U8
B8 or V8
packed 4:4:4
VYU(a)
(alpha)
V8
Y8
U8