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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 11: QVCP
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
11-415
11:0
DPCoeff
R/W
-
Differential phase coefcient
For the interpolator to work in bypass mode this register has to be
programmed to 0
Offset 0x10 E2AC
HSRU Phase
31:28
Unused
-
27:16
HSRU_d_phase
R/W
0
Unsigned. This delta phase is added with phase with every output
data. Once phase is added with a certain number of d_phases to
get overowed, then it’s time shift input sample signals.
For the HSRU to work in bypass mode this register has to be
programmed to 0.
Example:
8000 (hex) => upscaling by 2
4000 (hex) => upscaling by 4
15:7
Unused
-
5:0
HSRU_phase
R/W
0
Unsigned. This is the initial phase of input pixel phase. It determines
the portions of the rst input samples used to generate output
pixels.
Offset 0x10 E2B0
HSRU Delta Phase
31:26
Unused
-
25:16
HSRU_ddd_phase
R/W
0
Signed. This delta-delta-delta phase is added with delta-delta phase
to make it change. This is used for non-linear scaling ratios.For the
HSRU to work in bypass mode this register has to be programmed
to 0.
15:12
Unused
-
11:0
HSRU_dd_phase
R/W
0
Signed. This is the initial delta-delta phase. It is added with delta
phase to make it change. This is used for non-linear scaling ratios.
For the HSRU to work in bypass mode this register has to be
programmed to 0.
Note: Layer Size(nal) register has to be modied if HSRU scale
ratio is changed.
Offset 0x10 E2B4
Layer Size (nal)
31:12
Unused
-
11:0
LayerNWidth
R/W
0
nal (after scaling) Layer N width, in pixels.
Note: This register has to be programmed to match the nal width
after scaling, as given by the equation below.
Final width = (input width)*scaling ratio
LINT and HSRU can only crop at most 5 pixels off a scaled image.
Setting this register to a width which is more than 5 pixels smaller
than the scaled width can result in data underow.
On the other hand, if the nal width is greater than the scaled
image, the last pixel will be repeated to ll the nal width.
Always remember to update this register if LINT or HSRU scale
values are changed.
Offset 0x10 E2B8
Output and Alpha manipulation
31:24
Unused
-
Table 20: QVCP 1 Registers …Continued
Bit
Symbol
Acces
s
Value
Description