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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 23: LAN100 — Ethernet Media Access Controller
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
23-730
Transmit Flow Control Example
Figure 12 illustrates the transmit ow control.
In this example, the LAN100 receives a packet while transmitting another packet
(operating in full duplex.) The device driver detects some buffer might overrun, and
enables the transmit ow control by programming the PauseTimer and MirrorCounter
elds of the FlowControlCounter register after which it enables the transmit ow
control by setting the TxFlowControl bit in the Command register.
In response to enabling ow control, the LAN100 will send out a pause control frame
on the LAN after the packet currently being transmitted has nished. When the pause
frame transmission completes, the internal mirror counter will start counting bit slots.
As soon as the counter reaches the value in the MirrorCounter eld, another pause
frame is transmitted. While counting, the Transmit Datapath will continue normal
transmissions.
As soon as software disables transmit ow control, a zero-pause control frame is
transmitted to resume the receive process.
5.11 Half-duplex Mode Back Pressure
In half-duplex mode, the LAN100 can generate back pressure to stall receive packets
by sending a continuous preamble that basically jams any other transmissions on the
Ethernet medium. When the Ethernet module operates in half-duplex mode,
asserting the TxFlowControl bit in the Command register will cause continuous
preamble to be applied on the Ethernet wire, effectively blocking trafc from any other
Ethernet station on the same segment.
Figure 12: Transmit ow control
0
50
100
150
200
250
300
350
400
450
500
Tx clk cycles
PauseTimer,
MirrorCounter,
TxFlowCtrl
Clear
TxFlowCtrl
Normal
Transmission
Pause
Control
Frame
Transmission
Normal
Receive
Normal
Receive
Transmission
Pause
Control
Frame
Transmission
Pause
Control
Frame
Normal
Receive
MMIO
MII Transmit
MirrorCounter
(1/515 bit slots)
MII Receive
Normal
Transmission
Pause