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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 15: Audio Output
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
15-523
3
UNDERRUN
R
0
An UNDERRUN error has occurred i.e., the system controller/
software failed to provide a full DMA buffer in memory in time and
no new samples were transmitted. The last sample or sample pairs
were sent to the D/A converter.
If UDR_INTEN is also ‘1’, an interrupt request is pending. The
UNDERRUN ag can ONLY be cleared by writing an ‘1’ to
ACK_UDR.
2
HBE
R
0
Bandwidth Error indicates that no new data was transmitted due to
an inability of the DMA interface adapter to provide the required
data in time for the start of a new frame. The last data set is
repeated. If HBE_INTEN is an ‘1’, then an interrupt is also sent to
the system. The HBE ag stays set until an ‘1’ is written to
ACK_HBE.
1
BUF2_EMPTY
R
0
1= buffer 2 is empty.
If BUF2_INTEN is also ‘1’, an interrupt request is asserted.
BUF2_EMPTY is cleared by writing a ‘1’ to ACK2, at which point the
Audio Out hardware will assume that AO_BASE2 and AO_SIZE
describe a new full DMA buffer in memory.
0
BUF1_EMPTY
R
0
1= buffer 1 is empty.
If BUF1_INTEN is also ‘1’, an interrupt request is asserted.
BUF1_EMPTY is cleared by writing a ‘1’ to ACK1, at which point the
Audio Out hardware will assume that AO_BASE1 and AO_SIZE
describe a new full DMA buffer in memory.
Offset 0x11 0004
AO_CTL—DTL Clock Domain
31
RESET
R/W
0
description of software reset.
30
TRANS_ENABLE
R/W
0
Transmission Enable ag
0 = Audio Out is inactive.
1 = Audio Out transmits samples and acts as DMA master to read
samples from local memory.
Do not change any of the framing congurations while transmission
is enabled.
29:28
TRANS_MODE
R/W
00
00 = Mono, 32 bits/sample. Left and right data sent to each active
output are the same.
01 = Stereo, 32 bits/sample
10 = Mono, 16 bits/sample. Left and right data are the same.
11 = Stereo, 16 bits/sample
27
SIGN_CONVERT
R/W
0
0 =Leave MSB unchanged.
1 = Invert MSB (not applied to codec control elds).
26:25
Unused
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read
24
CC1_EN
R/W
0
0 = CC1 emission disabled.
1 = CC1 emission enabled.
23
CC2_EN
R/W
0
0 = CC2 emission disabled.
1 = CC2 emission enabled.
22
WS_PULSE
R/W
0
0 = Emit 50% WS.
1 = Emit single SCK cycle WS.
Table 9: Audio Output Port Registers …Continued
Bit
Symbol
Acces
s
Value
Description