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NXP Semiconductors
PNX15xx/952x Series
Volume 1 of 1
Chapter 5: The Clock Module
PNX15XX_PNX952X_SER_N_4
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 4.0 — 03 December 2007
5-199
31:0
count_stretcher_bits
R/W
0
The count between clock stretches
Offset 0x04,7504
CLK_WAKEUP_CTL
31:2
count_wakeup_bits
R/W
0
The count to use to automatically wake-up the MMIO and processor
clocks. The register is a 32-bit register with the two LSB bit hard-
coded to zero. If the CLK_WAKEUP_CTL register is written with a
value of 0x0000_0008. Then the wake-up count will be set to a
count value of 8. This means that the lowest count value is 4
(0x0000_0004 written to the CLK_WAKEUP_CTL register)
1
external_wakeup_enabl
e
R/W
0
Enables the use of pin GPIO[15] as a wake-up event.
0
gpio_interrupt_enable
R/W
0
Enables the use of the GPIO interrupt as an wake-up event.
Offset 0x04,7508
CLK_FREQ_CTL
31:5
freq_ctr_bits
R/W
0
The total time to count clock edges
4
freq_ctr_done
R
1
Signies that the count is done
3:0
en_ctr_enable
R/W
1
selects which clock to count
0000: Disabled
0001: PLL0
0010: PLL1
0011: PLL2
0100: UNDEF
0101: UNDEF
0110: DDS2
0111: DDS3
1000: DDS4
1001: DDS5
1010: DDS6
1011: DDS7
1100: DDS8
Offset 0x04,750C
CLK_COUNT_RESULTS
31:0
freq_ctr_results
R
-
The result of the count of the clock frequency counting.
Offset 0x04,7510
ALIGNER_ADJUST (RESERVED DO NOT MODIFY)
31:26
Reserved
R
-
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
25:24 Aligner_adjust_vdo_clk2
W1
11
Adjust the aligner for fgpo out (VDO_CLK2)
Note: this clock can not have latency added to it.
23:22 Aligner_adjust_area3
W1
10
Adjust the aligner for the clock going to area 3
21:20 Aligner_adjust_fgpo
R/W1
10
Adjust the aligner for fgpo out internal clock
19:18 Aligner_adjust_qvcp
R/W1
10
Adjust the aligner for qvcp out internal clock
17:16 Aligner_adjust_qvcp_pix
R/W1
10
Adjust the aligner for qvcp pix clock
15:14 Aligner_adjust_qvcp_out
R/W1
10
Adjust the aligner for qvcp out (VDO_CLK1)
13:12 Aligner_adjust_area7
R/W1
10
Adjust the aligner for the clock going to area 7
11:10 Aligner_adjust_area6
R/W1
10
Adjust the aligner for the clock going to area 6
Table 11: CLOCK MODULE REGISTERS …Continued
Bit
Symbol
Acces
s
Value
Description