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CHAPTER 2 V
R
4120A
Preliminary User’s Manual S14767EJ1V0UM00
97
Table 2-34. Extendable MIPS16 Instructions
MIPS16 Instruction
MIPS16 Immediate
Instruction
Format
Extended
Immediate
Instruction
Format
Load Byte
5
RRI
16
EXT-RRI
Load Byte Unsigned
5
RRI
16
EXT-RRI
Load Halfword
5
RRI
16
EXT-RRI
Load Halfword Unsigned
5
RRI
16
EXT-RRI
Load Word
5
8
RRI
RI
16
16
EXT-RRI
EXT-RI
Load Word Unsigned
5
RRI
16
EXT-RRI
Load Doubleword
5
RRI
16
EXT-RRI
Store Byte
5
RRI
16
EXT-RRI
Store Halfword
5
RRI
16
EXT-RRI
Store Word
5 (Other)
8 (SW rx, offset(sp))
8 (SW ra, offset(sp))
RRI
RI
I8
16
16
16
EXT-RRI
EXT-RI
EXT-I8
Store Doubleword
5 (SD ry, offset(rx))
8 (Other)
RRI
I64
16
16
EXT-RRI
EXT-I64
Load Immediate
8
RI
16
EXT-RI
Add Immediate Unsigned
4 (ADDIU ry, rx, imm)
8 (ADDIU sp, imm)
8 (Other)
RRI-A
I8
RI
15
16
16
EXT-RRI-A
EXT-I8
EXT-RI
Doubleword Add Immediate Unsigned
4 (DADDIU ry, rx, imm)
5 (DADDIU ry, pc, imm)
8 (Other)
RRI-A
RI64
I64
15
16
16
EXT-RRI-A
EXT-RI64
EXT-I64
Set on Less Than Immediate
8
RI
16
EXT-RI
Set on Less Than Immediate Unsigned
8
RI
16
EXT-RI
Compare Immediate
8
RI
16
EXT-RI
Shift Left Logical
3
SHIFT
5
EXT-SHIFT
Shift Right Logical
3
SHIFT
5
EXT-SHIFT
Shift Right Arithmetic
3
SHIFT
5
EXT-SHIFT
Doubleword Shift Left Logical
3
SHIFT
6
EXT-SHIFT
Doubleword Shift Right Logical
3
RR
6
EXT- SHIFT64
Doubleword Shift Right Arithmetic
3
RR
6
EXT- SHIFT64
Branch on Equal to Zero
8
RI
16
EXT-RI
Branch on Not Equal to Zero
8
RI
16
EXT-RI
Branch on T Equal to Zero
8
I8
16
EXT-I8
Branch on T Not Equal to Zero
8
I8
16
EXT-I8
Branch Unconditional
11
I
16
EXT-I