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CHAPTER 6 USB CONTROLLER
442
Preliminary User’s Manual S14767EJ1V0UM00
6.7.3 Remote wake up
The Remote Wake Up sequence is shown below.
Figure 6-28. Remote Wake Up Sequence
V
R
4120A
USB
Controller
Host PC
Receives the
data from line.
Sets RR bit(Bit0)
in USB General
Mode Register
Starts K-state
signaling
20ms
10ms
(1)
(2)
Stops K-state
signaling
(4)
(5)
Detects K-state
signaling.
Starts to
broadcast
RESUME signaling
(6)
Stops RESUME
signaling.
Executes EOP
signaling for only
2bit-time
(7)
End processing
of Remote Wake
Up
(8)
Sets sending
Data to USB
(3)
μ
PD98501
(1) Here, it is assumed that the USB is in the Suspend status. Data received from another communication line.
(2) The V
R
4120A RISC Processor sets the RR bit (Bit 0) of the USB General Mode Register in order to switch the
USB in the Suspend status to the Resume status.
(3) Once the RR bit of the USB General Mode Register has been set, USB Controller starts K-state Signaling for
the USB.
(4) The V
R
4120A RISC Processor can continue to set send data for the USB. Specifically, the V
R
4120A RISC
Processor prepares send data in system memory, then writes data into the USB Command Register (Address:
40H) and the USB Command Address Register (Address: 44H).
(5) USB Controller continues K-state Signaling for 5 ms, then terminates the signaling.
(6) The Host PC, upon receiving the K-state Signaling, broadcasts RESUME signaling. This RESUME signaling
continues for a minimum of 20 ms.
(7) Once at least 20 ms have elapsed, the Host PC terminates RESUME Signaling, then issues EOP Signaling for
a 2bit-time duration.
(8) As a result of this sequence, Remote Wake Up is terminated, and the transaction being performed by the USB
is restarted.