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CHAPTER 2 V
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4120A
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Preliminary User’s Manual S14767EJ1V0UM00
Table 2-33. Base PC Address Setting
Instruction
Base PC value
Non-extension PC-relative instructions
not located in Jump delay slot
PC of instruction
Extension PC-relative instruction
PC of Extend instruction
Non-extension PC-relative instruction in
Jump delay slot of JR or JALR
PC of JR instruction or JALR instruction
Non-extension PC-relative instruction in
Jump delay slot of JAL or JALX
PC of initial halfword of JAL or JALX
Note
Note
Because the JAL and JALX instruction length is 32 bits.
The PC value used as the base for address calculation for the PC-relative instruction outlines shown in tables 2-35
and 2-36 is called base PC value. The base PC value is defined so as to be equivalent to the exception program
counter (EPC) value related to the PC-relative instruction.
2.3.7.2 Extend instruction
The Extend instruction can extend the immediate fields of MIPS16 instructions, which have fewer immediate fields
than equivalent 32-bit MIPS instructions. The Extend instruction must always precede (by one instruction) the
instruction whose immediate field you want to extend. Every extended instruction consumes four bytes in program
memory instead of two bytes (two bytes for Extend and two bytes for the instruction being extended), and it can cross
a word boundary.
For example, the MIPS16 instruction contains a five-bit immediate.
LW ry, offset (rx)
The immediate expands to 16 bits (000000000
offset
00) before execution in the pipeline. This allows 32 different
offset values of 0, 4, 8, and up through 124. Once extended, this instruction can hold any of the normal 65,536 values
in the range –32,768 through 32,767.
Shift instructions are extended to 5-bit unsigned immediate values. All other immediate instructions expand to
either signed or unsigned 16-bit immediate values. The only exceptions are which can be extended only to a 15-bit
signed immediate.
ADDIU ry, rx, immediate
DADDIU ry, rx, immediate
Extended instructions should not be placed in jump delay slots. Otherwise, the results are unpredictable because
the pipeline would attempt to execute one half the instruction.
Table 2-34 lists the MIPS16 extendable instructions, the size of their immediate, and how much each immediate
can be extended when preceded with the Extend instruction.
For the instruction format of the Extend instruction, see
2.3.5 Instruction format
.