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型號(hào)：	μPD98501
廠商：	NEC Corp.
英文描述：	Network Controller(網(wǎng)絡(luò)控制器)
中文描述：	網(wǎng)絡(luò)控制器（網(wǎng)絡(luò)控制器）
文件頁(yè)數(shù)：	321/671頁(yè)
文件大?。?/td>	2229K
代理商：	ΜPD98501

CHAPTER 4 ATM CELL PROCESSOR

Preliminary User’s Manual S14767EJ1V0UM00

4.8.2.4 Non AAL-5 traffic support

(1) OAM F5 cell transmission

When host sets OAM F5 cell pattern(100 and 101) in the PTI field in packet descriptor, ATM Cell Processor doesn’t

add AAL-5 trailer. In this case, even though host sets more than 48 bytes in “SIZE” field in the packet descriptor, ATM

Cell Processor only reads 48 bytes from the top of the data buffer and ignores the data after that. If host sets the bytes

less than 48 byte in “SIZE” field, ATM Cell Processor adds padding. For OAM F5 cell transmission, host has to set

different packet descriptor for each OAM F5 cell.

For OAM F5 cell transmission, ATM Cell Processor inserts CRC-10, if host sets “C10 bit” to 1 in packet descriptor.

ATM Cell Processor calculates CRC-10 for 46 bytes and 6 bits and overwrites the result to the last 10 bits in the

(2) Raw cell transmission

When host sends the non AAL-5 traffic packet which is not OAM F5 cell, host sets “AAL” bit in the packet

descriptor to 0 and “PTI” field “0xx” which indicates user data. ATM Cell Processor doesn’t calculate or add AAL-5

trailer if “AAL” bit is 0.

If host sets “C10” bit in packet descriptor to 1, ATM Cell Processor calculates and adds CRC-10 for each cell.

Figure 4-37. Raw Cell with CRC-10

46 bytes and 6bits

Generation polynomial of CRC-10 is following:

G(x) = 1+x+x

4.8.2.5 Transmission indication

For each packet, ATM Cell Processor writes the send indication as the transmission completion status in the

mailbox. The mailbox used for transmission is mailbox 2 and 3. More specifically, ATM Cell Processor writes a send

indication once all the data in the packet has been read. The issuing of a send indication does not, therefore, indicate

that the sending of the packet to PMD has been completed.

Upon storing a send indication into the mailbox, ATM Cell Processor sets the corresponding MM bit of the A_GSR

The indication that ATM Cell Processor sends to the host during transmission is of the following format:

Figure 4-38. Send Indication Format

PACKET QUEUE POINTER

31 30 16 15 14 0

A (for Active)

VC NUMBER used by this VC

If 0, indicates that the VC enters the idle state because the packet descriptor is invalid.

If 1, indicates that the VC is kept active because the next packet descriptor is valid.

Low-order 15 bits of the start address of the next packet descriptor in the send queue

Packet Queue Pointer

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