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CHAPTER 2 V
R
4120A
Preliminary User’s Manual S14767EJ1V0UM00
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Table 2-24. MIPS16 Instruction Set Outline (3/3)
Op
Description
Shift instructions
SLL
Note 1
Shift Left Logical
SRL
Note 1
Shift Right Logical
SRA
Note 1
Shift Right Arithmetic
SLLV
Shift Left Logical Variable
SRLV
Shift Right Logical Variable
SRAV
Shift Right Arithmetic Variable
DSLL
Notes 1, 2
Doubleword Shift Left Logical
DSRL
Notes 1, 2
Doubleword Shift Right Logical
DSRA
Notes 1, 2
Doubleword Shift Right Arithmetic
DSLLV
Note 2
Doubleword Shift Left Logical Variable
DSRLV
Note 2
Doubleword Shift Right Logical Variable
DSRAV
Note 2
Doubleword Shift Right Arithmetic Variable
Notes 1.
Extendable instruction. For details, see
APPENDIX B MIPS16 INSTRUCTION
SET FORMAT
.
2.
Can be used in 64-bit mode and 32-bit kernel mode.
2.3.5 Instruction format
The MIPS16 instruction set has a length of 16 bits and is located at the halfword boundary. One part of Jump
instructions and instructions for which the Extend instruction extends immediate become 32 bits in length, but crossing
the word boundary does not represent a problem.
The instruction format is shown below. Variable subfields are indicated with lower case letters (rx, ry, rz,
immediate, etc.).
In the case of special functions, constants are input to the two instruction subfields op and funct. These values are
indicated by upper case mnemonics. For example, in the case of the Load Byte instruction, op is LB, and in the case
of the Add instruction, op is SPECIAL, and function is ADD.
The constants of the fields used in the instruction formats are shown below.
Table 2-25. Field Definition
Field
Definition
op
5-bit major operation code
rx
3-bit source/destination register specification
ry
3-bit source/destination register specification
immediate or imm
4-bit, 5-bit, 8-bit, or 11-bit immediate value, branch displacement, or
address displacement
rz
3-bit source/destination register specification
Funct or F
Function field