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型號(hào)：	μPD98501
廠商：	NEC Corp.
英文描述：	Network Controller(網(wǎng)絡(luò)控制器)
中文描述：	網(wǎng)絡(luò)控制器（網(wǎng)絡(luò)控制器）
文件頁(yè)數(shù)：	189/671頁(yè)
文件大?。?/td>	2229K
代理商：	ΜPD98501

Preliminary User’s Manual S14767EJ1V0UM00

2.6.4.12 Coprocessor unusable exception

The Coprocessor Unusable exception occurs when an attempt is made to execute a coprocessor instruction for

a corresponding coprocessor unit that has not been marked usable (Status register bit, CU0 = 0), or

CP0 instructions, when the unit has not been marked usable (Status register bit, CU0 = 0) and the process

executes in User or Supervisor mode.

This exception is not maskable.

(2) Processing

The common exception vector is used for this exception, and the CPU code in the ExcCode field of the Cause

When the MIPS16 instruction is disabled, the EPC register contains the address of the instruction that caused the

exception. However, if this instruction is in a branch delay slot, the EPC register contains the address of the

preceding jump or branch instruction, and the BD bit of the Cause register is set to 1.

When the MIPS16 instruction is enabled, the EPC register contains the address of the instruction that caused the

exception, and the least significant bit stores the ISA mode in which an exception occurs. However, if this

instruction is in a branch delay slot or is the instruction following the Extend instruction, the EPC register contains

the address of the preceding jump or Extend instruction, and the BD bit of the Cause register is set to 1.

(3) Servicing

The coprocessor unit to which an attempted reference was made is identified by the CE bit of the Cause register.

One of the following processing is performed by the handler:

If the process is entitled access to the coprocessor, the coprocessor is marked usable and the corresponding

state is restored to the coprocessor.

If the process is entitled access to the coprocessor, but the coprocessor does not exist or has failed,

interpretation of the coprocessor instruction is possible.

If the BD bit in the Cause register is set to 1, the branch instruction must be interpreted; then the coprocessor

instruction can be emulated and execution resumed with the EPC register advanced past the coprocessor

instruction.

If the process is not entitled access to the coprocessor, the kernel reports UNIX SIGILL/ILL_PRIVIN_FAULT

(illegal instruction/privileged instruction fault) signal to the current process, and this exception is fatal.

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