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型號(hào)：	μPD98501
廠商：	NEC Corp.
英文描述：	Network Controller(網(wǎng)絡(luò)控制器)
中文描述：	網(wǎng)絡(luò)控制器（網(wǎng)絡(luò)控制器）
文件頁(yè)數(shù)：	418/671頁(yè)
文件大?。?/td>	2229K
代理商：	ΜPD98501

CHAPTER 6 USB CONTROLLER

Preliminary User’s Manual S14767EJ1V0UM00

First, the V

4120A RISC Processor prepares the send data in system memory. The data must be of a format

that corresponds to the configuration of the send buffer.

4120A RISC Processor reads the USB Command Register.

4120A RISC Processor checks whether the Busy bit of the USB Command Register has been set. If

the Busy bit is set, it indicates that USB Controller is still executing the previous command. Thus the

4120A RISC Processor can not issue a new command.

4120A RISC Processor reads the USB Tx EndPoint Status Register.

4120A RISC Processor checks whether the EndPoint that is to perform send next is in the Busy status.

If the EndPoint is Busy, the V

4120A RISC Processor repeats the processing from the reading of the USB Tx

EndPoint Status Register.

4120A RISC Processor issues the Tx command.

4120A RISC Processor reads the USB General Status Registers 1.

4120A RISC Processor checks whether sending has terminated.

4120A RISC Processor reads the contents of the USB Tx Mailbox Read Address Register (Address:

4120A RISC Processor reads the send indication.

4120A RISC Processor updates the contents of the USB Tx MailBox Read Address Register.

By issuing a send command, the sending of a data segment can be scheduled.

A send command is issued by writing a value into the registers listed below. When writing, it is necessary to write

first to the USB Command Address Register, then the USB Command Register.

If data size field of USB Command Register is “0”, USB Controller sends Zero-Length Packet.

Figure 6-8. Send Command Issue

write head address of send

data segment

Specifies EndPoint Number

000: EndPoint0 (Control)

001: EndPoint1 (Isochronous)

010: EndPoint3 (Bulk)

011: EndPoint5 (Interrupt)

USB Command Register (0x40)

USB Command Address Register (0x44)

For a given EndPoint, it is possible to schedule the sending of up to two data items. Once two data items have

been sent, even if the V

4120A RISC Processor writes a send command into the USB Command Register to send a

third data item, that command is ignored.

The number of data items that are scheduled to be sent can be determined by reading the USB Tx EndPoint Status

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