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CHAPTER 6 USB CONTROLLER
Preliminary User’s Manual S14767EJ1V0UM00
393
6.2.2.17
USB Rx Pool0 Information Register (U_RP0IR): 50H
31
0
16
15
0
RNOD
Reserved
AL
30
29
28
27
Register that indicates the information of Receive Pool0.
The V
R
4120A RISC Processor write to this register once only when the device is being initialized.
Bit
Field
Description
R/W
31
Reserved
Reserved for future use
Write 0 to this bit.
R
30-28
AL
(Alert Level)
Sets the warning level for Pool0. If the number of Buffer Directories
remaining in this pool equals the value set in this field, USB Controller sets
the RPA0 bit of the USB General Status Register1 to 1.
Writing n into this field is equivalent to specifying n x 4 (remaining number of
Buffer Directories = 4, 8, 12, ..., 28). When 000 is written into this field, this
function is disabled and no notification is posted to the V
R
4120A RISC
Processor.
R/W
27-16
Reserved
Reserved for future use
R
15-0
RNOD
(Remaining Number of
Buffer Directory)
Indicates the number of Buffer Directories remaining in Pool0. The
V
R
4120A RISC Processor can only read this field.
Unlike the
μ
PD98401A and the
μ
PD98405, there is no need to write a value
into this field during initialization. Buffer Directory addition is performed
entirely using the USB Tx Rx Command Register.
R
6.2.2.18 USB Rx Pool0 Address Register (U_RP0AR): 54H
31
16
15
0
Address (Continued)
Address
This register indicates the head address of Buffer Directory which is currently used.
The way to set up Rx Pool is described at Section 6.6.3.
Bit
Field
Description
R/W
31-0
Buffer Directory
Address
Register that indicates the head address of the first Buffer Directory in
Pool0.
The V
R
4120A RISC Processor can only read this register.
Unlike the
μ
PD98401A and the
μ
PD98405, there is no need to write a value
into this register during initialization. Buffer Directory addition is performed
entirely using the USB Tx Rx Command Register.
R