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CHAPTER 2 V
R
4120A
Preliminary User’s Manual S14767EJ1V0UM00
2.5.2.5 User mode virtual addressing
In user mode, a single virtual address space labeled User segment is available ; its size is
—
2-Gbyte (2
—
1-Tbyte (2
31
bytes) in 32-bit mode (useg)
40
bytes) in 64-bit mode (xuseg)
Figure 2-38. User Mode Address Space
64-bitmode
32-bitmode
Note
0x8000 0000
0x7FFF FFFF
0xFFFF FFFF
Address error
0x0000 0100 0000 0000
0x0000 00FF FFFF FFFF
0xFFFF FFFF FFFF FFFF
Address error
xuseg
useg
0x0000 0000
2 Gbytes with
TLB mapping
0x0000 0000 0000 0000
1 Tbyte with
TLB mapping
Note
The V
R
4120A uses 64-bit addresses within it. When the processor is running in Kernel mode, it saves the
contents of each register or restores their previous contents to initialize them before switching the context.
For 32-bit mode addressing, bit 31 is sign-extended to bits 32 to 63, and the resulting 32 bits are used for
addressing. Usually, it is impossible for 32-bit mode programs to generate invalid addresses. If context
switching occurs and the processor enters Kernel mode, however, an attempt may be made to save an
address other than the sign-extended 32-bit address mentioned above to a 64-bit register. In this case,
user-mode programs are likely to generate an invalid address.
The User segment starts at address 0 and the current active user process resides in either useg (in 32-bit mode) or
xuseg (in 64-bit mode). The TLB identically maps all references to useg/xuseg from all modes, and controls cache
accessibility.
The processor operates in User mode when the Status register contains the following bit-values:
—
KSU = 10
—
EXL = 0
—
ERL = 0
In conjunction with these bits, the UX bit in the Status register selects addressing mode as follows:
—
When UX = 0, 32-bit useg space is selected.
—
When UX = 1, 64-bit xuseg space is selected.
Table 2-48 lists the characteristics of each user segment (useg and xuseg).