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參數(shù)資料
| 型號： | T7633 |
| 廠商： | Lineage Power |
| 英文描述： | Dual T1/E1 3.3 V Short-Haul Terminator(雙T1/E1 3.3V短通信距離終端器) |
| 中文描述： | 雙T1/E1的3.3伏短途終結(jié)者（雙T1/E1的3.3短通信距離終端器） |
| 文件頁數(shù)： | 90/248頁 |
| 文件大?。?/td> | 1459K |
| 代理商： | T7633 |
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Advance Data Sheet
T7633 Dual T1/E1 3.3 V Short-Haul Terminator
May 1998
80
Lucent Technologies Inc.
CEPT Time Slot 0 FAS/NOT FAS Control Bits
(continued)
NOT FAS A-Bit (CEPT Remote Frame Alarm) Sources
The A bit, as described in ITU Rec. G.704 Section 2.3.2 Table 4a/G.704, is the remote alarm indication bit. In
undisturbed conditions, this bit is set to 0 and transmitted to the line. In the loss of frame alignment (LFA) state, this
bit may be set to 1 and transmitted to the line as determined by register FRM_PR27. The A bit is set to 1 and trans-
mitted to the line for the following conditions:
1.
2.
Setting the transmit A bit = 1 control bit by setting register FRM_PR27 bit 7 to 1.
Optionally for the following alarm conditions as selected through programming register FRM_PR27.
A. The duration of loss of basic frame alignment as described in ITU Rec. G.706 Section 4.1.1
1
, or ITU Rec.
G.706 Section 4.3.2
2
if register FRM_PR27 bit 0 = 1.
B. The duration of loss of CRC-4 multiframe alignment if register FRM_PR27 bit 2 = 1.
C. The duration of loss of signaling time slot 16 multiframe alignment if register FRM_PR27 bit 1 = 1.
D. The duration of loss of CRC-4 multiframe alignment after either the 100 ms or 400 ms timer expires if
register FRM_PR27 bit 3 = 1.
E. The duration of receive Sa6_8hex
3
if register FRM_PR27 bit 4 = 1.
F.
The duration of receive Sa6_Chex
3
if register FRM_PR27 bit 5 = 1.
1. LFA is due to framing bit errors.
2. LFA is due to detecting 915 out of 1000 received CRC-4 errored blocks.
3. See Table 41, Sa6 Bit Coding Recognized by the Receive Framer, on page 95, for a definition of this Sa6 pattern.
NOT FAS Sa-Bit Sources
*
The Sa bits, Sa4—Sa8, in the NOT FAS frame can be a 4 kbits/s data link to and from the remote end. The sources
and value for the Sa bits are:
1.
The Sa source register FRM_PR29 bit 0—bit 4 if FRM_PR29 bit 7—bit 5 = 000 (binary) and FRM_PR30 bit 4—
bit 0 = 11111 (binary).
The facility data link external input (TFDL) if register FRM_PR29 bit 7 = 1 and register FRM_PR21 bit 6 = 1.
The internal FDL-HDLC if register FRM_PR29 bit 7 = 1 and register FRM_PR21 bit 6 = 0.
The Sa transmit stack if register FRM_PR29 bit 7—bit 5 are set to 01x (binary).
The CHI system interface if register FRM_PR29 bit 7—bit 5 are set to 001 (binary). This option requires the
received system data (RCHIDATA) to maintain a biframe alignment pattern where (1) frames containing Sa bit
information have bit 2 of time slot 0 in the binary 1 state and (2) these NOT FAS frames are followed by frames
not containing Sa bit information, the FAS frames, which have bit 2 of time slot 0 in the binary 0 state. This
ensures the proper alignment of the Sa received system data to the transmit line Sa data. Whenever this
requirement is not met by the system, the transmit framer will enter a loss of biframe alignment condition indi-
cated in the status register, FRM_SR1 bit 4, and then search for the pattern. In the loss of biframe alignment
state, transmitted line data is corrupted (only when the system interface is sourcing Sa or Si data). When the
transmit framer locates a new biframe alignment pattern, an indication is given in the status registers and the
transmit framer resumes normal operations.
2.
3.
4.
5.
The receive Sa data is present at:
A. The Sa received stack, registers FRM_SR54—FRM_SR63, if the T7633 is programmed in the Sa stack
mode.
B. The system transmit interface.
The status of the received Sa bits and the received Sa stack is available in status register FRM_SR4. The transmit
and receive Sa bit for the FDL can be selected by setting register FRM_PR43 bit 0—bit 2 as shown in Table 167.
* Whenever bits (e.g., Si, Sa, etc.) are transmitted from the system transparently, FRM_PR29 must first be momentarily written to 001xxxxx
(binary). Otherwise, the transmit framer will not be able to locate the biframe alignment.
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