參數(shù)資料
型號(hào): T7633
廠商: Lineage Power
英文描述: Dual T1/E1 3.3 V Short-Haul Terminator(雙T1/E1 3.3V短通信距離終端器)
中文描述: 雙T1/E1的3.3伏短途終結(jié)者(雙T1/E1的3.3短通信距離終端器)
文件頁(yè)數(shù): 125/248頁(yè)
文件大?。?/td> 1459K
代理商: T7633
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Advance Data Sheet
May 1998
T7633 Dual T1/E1 3.3 V Short-Haul Terminator
115
Lucent Technologies Inc.
Facility Data Link (FDL)
(continued)
Transmit Facility Data Link Interface
(continued)
Transmit ANSI Performance Report Messages (PRM)
When the ANSI PRM mode is enabled by setting register FDL_PR1 bit 7 to 1, the transmit FDL assembles and
transmits the ANSI performance report message once every second.
After assembling the ANSI PRM message, the receive framer stores the current second of the message in
registers FRM_SR62 and FRM_SR63 and transfers the data to the FDL transmit FIFO. After accumulating three
seconds (8 bytes) of the message, the FDL transmit block appends the header and the trailer (including the
opening and closing flags) to the PRM messages and transmits it to the framer for transmission to the line.
Table 51—Table 53 show the complete format of the PRM HDLC packet.
HDLC Operation
HDLC operation is the default mode of operation. The transmitter accepts parallel data from the transmit FIFO,
converts it to a serial bit stream, provides bit stuffing as necessary, adds the CRC-16 and the opening and closing
flags, and sends the framed serial bit stream to the transmit framer. HDLC frames on the serial link have the
following format.
All bits between the opening flag and the CRC are considered user data bits. User data bits such as the address,
control, and information fields for LAPB or LAPD frames are fetched from the transmit FIFO for transmission. The
16 bits preceding the closing flag are the frame check sequence, cyclic redundancy check (CRC), bits.
Zero-Bit Insertion/Deletion (Bit Stuffing/Destuffing)
The HDLC protocol recognizes three special bit patterns: flags, aborts, and idles. These patterns have the
common characteristic of containing at least six consecutive 1s. A user data byte can contain one of these special
patterns. Transmitter zero-bit stuffing is done on user data and CRC fields of the frame to avoid transmitting one of
these special patterns. Whenever five 1s occur between flags, a 0 bit is automatically inserted after the fifth 1, prior
to transmission of the next bit. On the receive side, if five successive 1s are detected followed by a 0, the 0 is
assumed to have been inserted and is deleted (bit destuffing).
Table 55. HDLC Frame Format
Opening Flag
User Data Field
Frame Check
Sequence (CRC)
16 bits
Closing Flag
01111110
8 bits
01111110
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