參數(shù)資料
型號(hào)： GE28F640W30TD70
廠商： INTEL CORP
元件分類： PROM
英文描述： 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝： 0.75 MM PITCH, VFBGA-56
文件頁(yè)數(shù)： 93/104頁(yè)
文件大?。?/td> 1443K
代理商： GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
89
14.9
Burst Wrap (RCR[3])
The burst wrap bit determines whether 4-word, 8-word, or 16-word burst accesses wrap within the
burst-length boundary, or they cross word-length boundaries to perform linear accesses.
No-wrap mode (RCR[3]=1) enables WAIT to hold off the system processor, as it does in the
continuous burst mode, until valid data is available.
In no-wrap mode (RCR[3]=0), the flash device operates similarly to continuous linear burst mode,
but consumes less power during 4-word, 8-word, or 16-word bursts.
For example, if RCR[3]=0 (wrap mode) and RCR[2:0] = 1h (4-word burst), possible linear burst
sequences are 0-1-2-3, 1-2-3-0, 2-3-0-1, 3-0-1-2.
If RCR[3]=1 (no-wrap mode) and RCR[2:0] = 1h (4-word burst length), then possible linear burst
sequences are 0-1-2-3, 1-2-3-4, 2-3-4-5, and 3-4-5-6. RCR[3]=1 not only enables limited non-
aligned sequential bursts, but also reduces power by minimizing the number of internal read
operations.
Setting RCR[2:0] bits for continuous linear burst mode (7h) also achieves the above 4-word burst
sequences. However, significantly more power might be consumed. The 1-2-3-4 sequence, for
example, consumes power during the initial access, again during the internal pipeline lookup as the
processor reads word 2, and possibly again, depending on system timing, near the end of the
sequence as the flash device pipelines the next 4-word sequence. RCR[3]=1 while in 4-word burst
mode (no-wrap mode) reduces this excess power consumption.
14.10
Burst Length (RCR[2:0])
The burst length is the number of words the flash device outputs in a synchronous read access.
4-word, 8-word, 16-word, and continuous-word are supported.
In 4-word, 8-word, or 16-word burst configuration, the burst wrap bit (RCR[3]) determines
whether burst accesses wrap within word-length boundaries, or they cross word-length boundaries
to perform a linear access.
After an address is specified, the flash device outputs data until it reaches the end of its burstable
address space. Continuous burst accesses are linear only (burst wrap bit RCR[3] is ignored during
continuous burst) and do not wrap within word-length boundaries (see Table 30, “Sequence and
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