參數(shù)資料
型號： GE28F640W30TD70
廠商： INTEL CORP
元件分類： PROM
英文描述： 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝： 0.75 MM PITCH, VFBGA-56
文件頁數(shù)： 22/104頁
文件大小： 1443K
代理商： GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
June 2005
Intel Wireless Flash Memory (W30)
Datasheet
24
Order Number: 290702, Revision: 011
R-UB#
R-LB#
Input
RAM UPPER / LOWER BYTE ENABLES: Low-true input.
During RAM read and write cycles:
R-UB# low enables the RAM high order bytes on D[15:8].
R-LB# low enables the RAM low-order bytes on D[7:0].
R-UB# and R-LB# are available on stacked combinations with PSRAM or SRAM die, and are RFU on
flash-only stacked combinations.
F-RST#
Input
FLASH RESET: Low-true input.
F-RST# low initializes flash device internal circuitry and disables flash device operations.
F-RST# high enables flash device operation.
Exit from reset places the flash device in asynchronous read array mode.
P-Mode,
P-CRE
Input
P-Mode (PSRAM Mode): Low-true input.
P-Mode programs the Configuration Register, and enters/exits the Low Power Mode of the PSRAM
die.
P-Mode is available on stacked combinations with asynchronous-only PSRAM die.
P-CRE (PSRAM Configuration Register Enable): High-true input.
P-CRE is high, write operations load the Refresh Control Register or Bus Control Register.
P-CRE applies only on combinations with synchronous PSRAM die.
P-Mode, P-CRE is an RFU on stacked combinations without PSRAM die.
F-VPP,
F-VPEN
Power
FLASH PROGRAM AND ERASE POWER: Valid F-VPP voltage on this ball enables flash memory
device program/erase operations.
Flash memory array contents cannot be altered when F-VPP(F-VPEN) < VPPLK (VPENLK). Do not
attempt erase / program operations at invalid F-VPP (F-VPEN) voltages.
F-VPEN (Erase/Program/Block Lock Enables) is not available for L18/L30 SCSP products.
F[2:1]-VCC
Power
FLASH LOGIC POWER:
F1-VCC supplies power to the core logic of flash die #1.
F2-VCC supplies power to the core logic of flash die #2 and flash die #3.
Write operations are inhibited when F-VCC < VLKO. Do not attempt flash device operations at invalid
F-VCC voltages.
F2-VCC is available on stacked combinations with two or three flash dies, and is an RFU on stacked
combinations with only one flash die.
S-VCC
Power
SRAM POWER SUPPLY: Supplies power for SRAM operations.
S-VCC is available on stacked combinations with SRAM die, and is RFU on stacked combinations
without SRAM die.
P-VCC
Power
PSRAM POWER SUPPLY: Supplies power for PSRAM operations.
P-VCC is available on stacked combinations with PSRAM die, and is RFU on stacked combinations
without PSRAM die.
VCCQ
Power
FLASH DEVICE I/O POWER: Supply power for the flash device input and output buffers.
VSS
Power
FLASH DEVICE GROUND: Connect to system ground. Do not float any VSS connection.
RFU
—
RESERVED for FUTURE USE: Reserved for future flash device functionality/ enhancements. Contact
Intel regarding the use of balls designated RFU.
DU
—
DO NOT USE: Do not connect to any other signal, or power supply; must be left floating.
Table 6.
Signal Descriptions - QUAD+ Package (Sheet 3 of 3)
Symbol
Type
Description
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