參數(shù)資料
型號(hào)： GE28F640W30TD70
廠(chǎng)商： INTEL CORP
元件分類(lèi)： PROM
英文描述： 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA56
封裝： 0.75 MM PITCH, VFBGA-56
文件頁(yè)數(shù)： 30/104頁(yè)
文件大?。?/td> 1443K
代理商： GE28F640W30TD70
28F640W30, 28F320W30, 28F128W30
Datasheet
Intel Wireless Flash Memory (W30)
June 2005
Order Number: 290702, Revision: 011
31
R10
tOH
CE# (OE#) High to Output Low-Z
0
-
0
-
0
-
ns
3,4
R11
tEHEL
CE# Pulse Width High
20
-
20
-
20
-
ns
5
R12
tELTV
CE# Low to WAIT Valid
-
20
-
22
-
22
ns
5
R13
tEHTZ
CE# High to WAIT High-Z
-
25
-
25
-
25
ns
4,5
Latching Specifications
R101
tAVVH
Address Setup to ADV# High
10
-
10
-
12
-
ns
-
R102
tELVH
CE# Low to ADV# High
10
-
10
-
12
-
ns
-
R103
tVLQV
ADV# Low to Output Valid
-
70
-
85
-
90
ns
6
R104
tVLVH
ADV# Pulse Width Low
10
-
10
-
12
-
ns
-
R105
tVHVL
ADV# Pulse Width High
10
-
10
-
12
-
ns
-
R106
tVHAX
Address Hold from ADV# High
9
-
9
-
9
-
ns
2
R108
tAPA
Page Address Access Time
-
25
-
25
-
30
ns
-
Clock Specifications
R200
fCLK
CLK Frequency
-
40
-
33
-
33
MHz
-
R201
tCLK
CLK Period
25
-
30
-
30
-
ns
-
R202
tCH/L
CLK High or Low Time
9.5
-
9.5
-
9.5
-
ns
-
R203
tCHCL
CLK Fall or Rise Time
-
3
5
-
5
ns
-
Synchronous Specifications
R301
tAVCH
Address Valid Setup to CLK
9
-
9
-
10
-
ns
-
R302
tVLCH
ADV# Low Setup to CLK
10
-
10
-
10
-
ns
-
R303
tELCH
CE# Low Setup to CLK
9
-
9
-
9
-
ns
-
R304
tCHQV
CLK to Output Valid
-
20
-
22
-
22
ns
-
R305
tCHQX
Output Hold from CLK
5
-
5
-
ns
-
R306
tCHAX
Address Hold from CLK
10
-
10
-
10
-
ns
2
R307
tCHTV
CLK to WAIT Valid
-
20
-
22
-
22
ns
-
Notes:
1.
allowable input slew rate.
2.
Address hold in synchronous-burst mode is defined as tCHAX or tVHAX, whichever timing specification is
satisfied first.
3.
OE# can be delayed by up to tELQV– tGLQV after the falling edge of CE# without impact to tELQV.
4.
Sampled, not 100% tested.
5.
Applies only to subsequent synchronous reads.
6.
During the initial access of a synchronous burst read, data from the first word might begin to be driven onto the
data bus as early as the first clock edge after tAVQV.
Table 12.
Read Operations - 180 nm Lithography (Sheet 2 of 2)
#
Sym
Parameter
1
32-Mbit
64-Mbit
128-Mbit
Units
Notes
-70
-85
-90
Min
Max
Min
Max
Min
Max
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