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CHAPTER 4 INTERFACES
62
(2) Burst transfer
The
μ
PD98405 supports burst transfer of 1, 2, 4, 8, 12, or 16 words. The user can select the burst size to
be enabled by setting the "SZ field" or "TBE field" of the GMR register.
Table 4-2. Selecting Burst Size to Be Enabled
Selects the burst size to be used
(GMR register: Bits 11 through 8: SZ field, Bit 16: TBE field).
Bit 11
1: Enables 16-word burst,
0: Disabled
Bit 10
1: Enables 8-word burst,
0: Disabled
Bit 9
1: Enables 4-word burst,
0: Disabled
SZ field
Bit 8
1: Enables 2-word burst,
0: Disabled
TBE bit
Bit 16
1: Enables 12-word burst,
(The AD bit must always be set to 1.)
0: Disabled
Default = All 0 (supports 1-word transfer only.)
More than one burst size can be enabled at the same time. Regardless of the setting of the "SZ field" and
"TBE field," 1-word transfer is always enabled. When the TBE bit is set to 1 to enable 12-word burst, the
AD bit must always be set to 1 to disable the burst size select function. If 16-word transfer is enabled, the
μ
PD98405 executes 16-word burst only when raw cells are written into system memory.
The master (DMA) operation performed by the
μ
PD98405 is executed to transfer the following data listed in
Table 4-3. For an explanation of the meaning of each operation, see
Chapter 5
. Some data types must
always start on a word (32-bit) boundary. Other data types can start on a byte boundary.
Table 4-3. DMA Transfer by
μ
PD98405
Read/write
Data type
Number of words
Can start on byte boundary
Packet descriptor
4 words
No
Buffer descriptor
2 words
No
Transmit cell data
1 to 12 words
Yes
Receive batch (size, address) 2 words
No
Read
Receive batch link pointer
1 word
No
Transmission indication
1 word
No
Reception indication
4 words
No
Receive cell data
1 to 12 words
Yes
Receive batch link pointer
1 word
No
Write
Raw cell data
1 to 16 words
Yes