![](http://datasheet.mmic.net.cn/380000/-PD98405_datasheet_16745025/-PD98405_295.png)
CHAPTER 7 REGISTERS
295
Field
Function
Value after reset
CPE
Enables/disables the control memory parity check function.
0: Parity disabled
1: Parity enabled
0: Control memory parity
disabled
LP
Sets loopback mode.
0: Normal operation
1: Loopback mode
0: Normal operation
WA
Note
ABRT_B signal and RDY_B signal sampling timing of DMA write
operation.
0: Normal mode
1: Early mode
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Normal
RA
Note
ABRT_B signal and RDY_B signal sampling timing of DMA read
operation.
0: Normal mode
1: Early mode
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Normal mode
SZ
Note
Enables burst size.
Two or more bursts can be enabled.
Bit 8 '1' - Enables 2-word burst
Bit 9 '1' - Enables 4-word burst
Bit 10 '1' - Enables 8-word burst
Bit 11 '1' - Enables 16-word burst
This field is valid only in Generic mode. For PCI mode, 0000 must be
set.
Remark
μ
PD98405 uses 16-word burst only to store raw cell data.
All 0. All multiple-word DMA
transfer disabled. Only one-
word transfer enabled.
AD
Enables or disables function for checking address field of transfer
destination and for automatically selecting burst size when
μ
PD98405
executes DMA transfer.
0: Enable
1: Disable
0: Enable
BO
Note
Selects big endian or little endian.
0: Little endian
1: Big endian
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Little endian
PM
Note
Selects bus parity mode.
0: Byte parity
1: Word parity
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Byte parity
PC
Note
Controls even/odd of bus parity.
0: Even parity
1: Odd parity
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Even parity
BPE
Note
Enables or disables bus parity check.
0: Bus parity disabled
1: Bus parity enabled
This bit is valid only in Generic mode. For PCI mode, 0 must be set.
0: Bus parity disabled
Note
These fields are valid only in Generic mode.