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參數(shù)資料
| 型號(hào)： | μPD98405 |
| 廠商： | NEC Corp. |
| 英文描述： | 155M ATM Integrated SAR Controller(155M ATM SAR集成控制器) |
| 中文描述： | 155M章綜合特區(qū)控制器自動(dòng)柜員機(jī)（155M章自動(dòng)柜員機(jī)特區(qū)集成控制器） |
| 文件頁(yè)數(shù)： | 197/391頁(yè) |
| 文件大?。?/td> | 3644K |
| 代理商： | ΜPD98405 |
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CHAPTER 5 SAR FUNCTION
197
5.5.6 Issuing Receive Indication
In the case of a packet of AAL-5-type traffic, the
μ
PD98405 issues receive indication to report to the host
that it has received a packet. As the receive indication, 4-word information is generated for each packet and
stored to a mailbox. The mailbox used for reception is mailbox 0 or 1. Which mailbox is to be used is selected
by the host by setting the "MB" bit of the VC table for each VC. When the receive indication is stored, the
corresponding MM bit of the
μ
PD98405's GSR register is set to 1, and an interrupt is issued provided it is not
masked. The receive indication contains the start address and size of the batch used by the
μ
PD98405 to store
the packet. The host can process the packet data that has arrived by reading the receive indication.
The receive indication is issued once all data (including the AAL-5 trailer) has been stored to the receive
buffer after the packet has been received normally. If a packet containing an error has been received, and if the
error is a "CRC-32 error" or "Length error," the indication is issued when all the data (including the AAL-5 trailer)
has been stored to the receive buffer. If any other error occurs, the indication is issued as soon as the error
(except the FIFO overrun) has been detected. The detected error is reported in the indication as an error
status. If the host reads a receive indication that contains an error status, it performs appropriate processing,
and discards the error packet.
The receive indication is issued also when a Deactivate_Channel command or early receive interrupt is
issued.
For details of the format of the receive indication, see
Section 5.6 (2)
.
5.5.7 Early Receive Interrupt
For AAL-5 traffic packets, the
μ
PD98405 supports the early receive interrupt function for requesting an
interrupt to the host when it has received several cells of the packet, and reporting with a receive indication. An
early receive interrupt is set up separately for individual VCs. The timing of early receive interrupts can be
specified in receive cell units.
An early receive interrupt is specified in the EIS field of a receive VC table. If the EIS field is set to "001" or
greater, the early receive interrupt is enabled. Once the
μ
PD98405 has received the number of cells specified
in the EIS field, it requests an interrupt to the host to set an early receive indication in the mailbox. The early
receive indication contains "1111" in its STATUS field. In the early receive indication, the CI and CLP bits are
meaningless. These bits are set to 0. The PACKET SIZE in the receive indication is indicated in cell units,
even in Length mode. The number of cells received before the early receive interrupt is issued to the host is
stored. The other fields of the early receive indication have the same meaning as in the case of normal receive
indication.
If the EIS field contains "000," the early receive interrupt is disabled, then the
μ
PD98405 requests an
interrupt and stores a receive indication, but only once it has received a complete packet.
The early receive interrupt is useful in protocol header processing. The host can perform protocol header
processing for a packet as soon as it has received an early receive indication in which the STATUS field
contains "1111" for that packet. In other words, header processing can be performed before the
μ
PD98405
receives a complete packet, that is immediately after it has received the protocol header.
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