參數(shù)資料
型號(hào)： T7234
英文描述： Compliance with the New ETSI PSD Requirement
中文描述： 符合新的ETSI PSD的要求
文件頁數(shù)： 42/116頁
文件大小： 1056K
代理商： T7234
Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
38
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Registers
(continued)
Table 25. Global Interrupt Register (Address 19h)
These bits are cleared during RESET.
Reg
GIR0
R/W
R
Bit 7
—
Bit 6
—
Bit 5
—
Bit 4
—
Bit 3
—
Bit 2
MINT
Bit 1
SINT
Bit 0
UINT
Register
GIR0
Bit
0
Symbol
UINT
Name/Description
U-Transceiver Interrupt.
Activates (set to 1) when any of the unmasked
U-transceiver interrupt bits (register UIR0) activate.
0—No U-transceiver interrupts.
1—U-transceiver interrupt active.
S/T-Transceiver Interrupt.
Activates (set to 1) when any of the un-
masked S/T-transceiver interrupt bits (register SIR0) activate.
0—No S/T-transceiver interrupts.
1—S/T-transceiver interrupt active.
Maintenance Interrupt.
Activates (set to 1) when any of the unmasked
maintenance interrupt bits (register MIR0) activate.
0—No maintenance interrupts.
1—Maintenance interrupt active.
GIR0
1
SINT
GIR0
2
MINT
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T7234A 制造商:AGERE 制造商全稱:AGERE 功能描述:Compliance with the New ETSI PSD Requirement
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