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TMS320DM6446
Digital Media System on-Chip
SPRS283–DECEMBER 2005
PSC Register Memory Map (continued)
REGISTER
ACRONYM
PDCTL1
-
HEX ADDRESS RANGE
DESCRIPTION
0x01C4 1304
0x01C4 1308 - 0x01C4 14FF
0x01C4 1500
0x01C4 1504
0x01C4 1508 0x1C4 150F
0x01C4 1510
0x01C4 1514
0x01C4 1518 - 0x01C4 15FF
0x01C4 1600
0x01C4 1604
0x01C4 1608
0x01C4 160C
0x01C4 1610
0x01C4 1614
0x01C4 1618
0x01C4 161C
0x01C4 1620
0x01C4 1624
0x01C4 1628
0x01C4 162C
0x01C4 1630
0x01C4 1634
0x01C4 1638
0x01C4 163C
0x01C4 1640
0x01C4 1644
0x01C4 1648
0x01C4 164C
0x01C4 1650
0x01C4 1654
0x01C4 1658
0x01C4 165C
0x01C4 1660
0x01C4 1664
0x01C4 1668
0x01C4 166C
0x01C4 1670
0x01C4 1674 - 0x01C4 169B
0x01C4 169C
0x01C4 16A0
0x01C4 16A4 - 0x01C4 17FF
0x01C4 1800
0x01C4 1804
0x01C4 1808
0x01C4 180C
0x01C4 1810
Power Domain Control 1 Register (DSP)
Reserved
Reserved
Reserved
Reserved
Module Clock Output Status (mod 0-31) Register
Module Clock Output Status (mod 32-63) Register
Reserved
Module Configuration 0 Register (VPSS DMA)
Module Configuration 1 Register (VPSS MMR)
Module Configuration 2 Register (EDMACC)
Module Configuration 3 Register (EDMATC0)
Module Configuration 4 Register (EDMATC1)
Module Configuration 5 Register (EMAC)
Module Configuration 6 Register (EMAC Memory Controller)
Module Configuration 7 Register (MDIO)
Reserved
Module Configuration 9 Register (USB)
Module Configuration 10 Register (ATA/CF)
Module Configuration 11 Register (VLYNQ)
Reserved
Module Configuration 13 Register (DDR2)
Module Configuration 14 Register (EMIFA)
Module Configuration 15 Register (MMC/SD)
Reserved
Module Configuration 17 Register (ASP)
Module Configuration 18 Register (I2C)
Module Configuration 19 Register (UART0)
Module Configuration 20 Register (UART1)
Module Configuration 21 Register (UART2)
Module Configuration 22 Register (SPI)
Module Configuration 23 Register (PWM0)
Module Configuration 24 Register (PWM1)
Module Configuration 25 Register (PWM2)
Module Configuration 26 Register (GPIO)
Module Configuration 27 Register (TIMER0)
Module Configuration 28 Register (TIMER1)
Reserved
Module Configuration 39 Register (C64x+ CPU)
Module Configuration 40 Register (VICP)
Reserved
Module Status 0 Register (VPSS DMA)
Module Status 1 Register (VPSS MMR)
Module Status 2 Register (EDMACC)
Module Status 3 Register (EDMATC0)
Module Status 4 Register (EDMATC1)
-
MCKOUT0
MCKOUT1
-
MDCFG0
MDCFG1
MDCFG2
MDCFG3
MDCFG4
MDCFG5
MDCFG6
MDCFG7
MDCFG9
MDCFG10
MDCFG11
MDCFG13
MDCFG14
MDCFG15
MDCFG17
MDCFG18
MDCFG19
MDCFG20
MDCFG21
MDCFG22
MDCFG23
MDCFG24
MDCFG25
MDCFG26
MDCFG27
MDCFG28
-
MDCFG39
MDCFG40
-
MDSTAT0
MDSTAT1
MDSTAT2
MDSTAT3
MDSTAT4
92
Peripheral and Electrical Specifications