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TMS320DM6446
Digital Media System on-Chip
SPRS283–DECEMBER 2005
Table 5-61. USB 2.0 Register Descriptions (continued)
Address
0x01C6 41B8
0x01C6 41BC
Acronym
RCPPIDMASTATEW6
RCPPICOMPPTR
Register Description
RX CPPI DMA State Word 6
RX CPPI Completion Pointer
TX/RX CCPI Channel 3 State Block
TX CPPI DMA State Word 0
TX CPPI DMA State Word 1
TX CPPI DMA State Word 2
TX CPPI DMA State Word 3
TX CPPI DMA State Word 4
TX CPPI DMA State Word 5
TX CPPI DMA State Word 6
TX CPPI Completion Pointer
RX CPPI DMA State Word 0
RX CPPI DMA State Word 1
RX CPPI DMA State Word 2
RX CPPI DMA State Word 3
RX CPPI DMA State Word 4
RX CPPI DMA State Word 5
RX CPPI DMA State Word 6
RX CPPI Completion Pointer
Reserved
Reserved
Function Address Register
Power Management Register
Interrupt Register for Endpoint 0 plus TX Endpoints 1 to 4
Interrupt Register for RX Endpoints 1 to 4
Interrupt Enable Register for INTRTX
Interrupt Enable Register for INTRRX
Interrupt Register for Common USB Interrupts
Interrupt Enable Register for INTRUSB
Frame Number Register
Index register for selecting the endpoint status and control registers
Register to enable the USB 2.0 test modes
Maximum packet size for peripheral/host TX endpoint (Index register set to select
Endpoints 1 - 4 only)
Reserved
Control Status register for Endpoint 0 in Peripheral mode. (Index register set to
select Endpoint 0)
Control Status register for Endpoint 0 in Host mode. (Index register set to select
Endpoint 0)
Control Status register for peripheral TX endpoint. (Index register set to select
Endpoints 1 - 4)
Control Status register for host TX endpoint. (Index register set to select
Endpoints 1 - 4)
Reserved
Maximum packet size for peripheral/host RX endpoint (Index register set to select
Endpoints 1 - 4 only)
Control Status register for peripheral RX endpoint. (Index register set to select
Endpoints 1 - 4)
Control Status register for host RX endpoint. (Index register set to select
Endpoints 1 - 4)
0x01C6 41C0
0x01C6 41C4
0x01C6 41C8
0x01C6 41CC
0x01C6 41D0
0x01C6 41D4
0x01C6 41D8
0x01C6 41DC
0x01C6 41E0
0x01C6 41E4
0x01C6 41E8
0x01C6 41EC
0x01C6 41F0
0x01C6 41F4
0x01C6 41F8
0x01C6 41FC
0x01C6 4200
0x01C6 43FC
0x01C6 4400
0x01C6 4401
0x01C6 4402
0x01C6 4404
0x01C6 4406
0x01C6 4408
0x01C6 440A
0x01C6 440B
0x01C6 440C
0x01C6 440E
0x01C6 440F
0x01C6 4410
TCPPIDMASTATEW0
TCPPIDMASTATEW1
TCPPIDMASTATEW2
TCPPIDMASTATEW3
TCPPIDMASTATEW4
TCPPIDMASTATEW5
TCPPIDMASTATEW6
TCPPICOMPPTR
RCPPIDMASTATEW0
RCPPIDMASTATEW1
RCPPIDMASTATEW2
RCPPIDMASTATEW3
RCPPIDMASTATEW4
RCPPIDMASTATEW5
RCPPIDMASTATEW6
RCPPICOMPPTR
Reserved
Reserved
FADDR
POWER
INTRTX
INTRRX
INTRTXE
INTRRXE
INTRUSB
INTRUSBE
FRAME
INDEX
TESTMODE
TXMAXP
0x01C6 4411
0x01C6 4412
Reserved
PERI_CSR0
0x01C6 4412
HOST_CSR0
0x01C6 4412
PERI_TXCSR
0x01C6 4412
HOST_TXCSR
0x01C6 4413
0x01C6 4414
Reserved
RXMAXP
0x01C6 4416
PERI_RXCSR
0x01C6 4416
HOST_RXCSR
Peripheral and Electrical Specifications
173