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User’s Manual U16890EJ1V0UD
861
APPENDIX D REVISION HISTORY
D.1 Modifications from Document Number U15862EJ4V1UD00
Page
Description
Throughout
Extraction of only descriptions concerning V850ES/KG1
Addition of 100-pin plastic QFP (14
×
20)
Addition of following products
μ
PD703215, 703215Y, 70F3214H, 70F3214HY, 70F3215H, 70F3215HY
Addition of pins supporting added products
Addition of internal ROM, RAM, and flash memory capacities of added products
p. 40
Modification of description in
1.7 Overview of Functions
p. 53
Modification of I/O circuit type 13-B to 13-AH in
2.4 Pin I/O Circuits
p. 63
Modification of description in
3.3 (2) Flash memory programming mode
p. 68
Addition of
3.4.4 (1) (a) Internal ROM (256 KB)
p. 70
Addition of
3.4.4 (2) (a) Internal RAM (16 KB)
p. 76
Modification of description in
3.4.6 Peripheral I/O registers
p. 89
Modification of description in
3.4.8 (1) (a) System wait control register (VSWC)
and
(b) Access to special
on-chip peripheral I/O register
p. 92
Addition of
3.4.8 (2) Restriction on conflict between sld instruction and interrupt request
p. 96
Addition of
4.3 (5) Port n function control expansion register (PFCEn)
p. 98
Modification of description in
Figure 4-1 Register Settings and Pin Functions
p. 107
Modification of description in
4.3.3 (5) Port 3 function control register (PFC3)
p. 108
Addition of
4.3.3 (6) Port 3 function control expansion register (PFCE3)
p. 108
Addition of
4.3.3 (8) Specifying alternate-function pins of port 3
pp. 134 to 159
Modification of
Figures 4-3
to
4-28
(partial addition)
p. 161
Modification of description in
Table 4-16 Settings When Port Pins Are Used for Alternate Functions
p. 206
Addition of
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
p. 503
Addition of
Caution 1
in
18.3 (7) CSIAn buffer RAM (CSIAnBm)
p. 633
Modification of bit 7 in
22.2 (2) Power save mode register (PSMR)
p. 656
Addition of
CHAPTER 26 FLASH MEMORY (SINGLE POWER)
p. 698
Addition of
CHAPTER 28 ELECTRICAL SPECIFICATIONS (256 KB MASK ROM VERSION, SINGLE-
POWER FLASH MEMORY VERSION) (TARGET)
pp. 761 to 783
Modification of bus timing, basic operation, and timer timing in
CHAPTER 29 ELECTRICAL
SPECIFICATIONS (STANDARD PRODUCTS (MASK ROM VERSION OF 128 KB OR LESS AND TWO-
POWER FLASH MEMORY VERSION), (A) GRADE PRODUCTS)
pp. 805, 806
Modification of basic operation and timer timing in
CHAPTER 30 ELECTRICAL SPECIFICATIONS ((A1)
GRADE PRODUCTS)
pp. 826, 827
Modification of basic operation and timer timing in
CHAPTER 31 ELECTRICAL SPECIFICATIONS ((A2)
GRADE PRODUCTS)
p. 839
Addition of
APPENDIX A DEVELOPMENT TOOLS
p. 845
Addition of
APPENDIX B INSTRUCTION SET LIST