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CHAPTER 28 ELECTRICAL SPECIFICATIONS (256 KB MASK ROM VERSION, SINGLE-POWER FLASH MEMORY VERSION) (TARGET)
User’s Manual U16890EJ1V0UD
702
Subclock Oscillator Characteristics (T
A
=
40 to +85
°
C, V
DD
= 2.7 to 5.5 V, V
SS
= 0 V)
Resonator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation frequency
(f
XT
)
Note 1
32
32.768
35
kHz
Crystal
resonator
Oscillation
stabilization time
Note 2
10
s
External
clock
XT1 input frequency
(f
XT
)
Duty = 50%
±
5%
Note 1
REGC = V
DD
32
35
kHz
Notes 1.
Indicates only oscillator characteristics.
2.
Time required from when V
DD
reaches oscillation voltage range (2.7 V (MIN.)) to when the crystal
resonator stabilizes.
Cautions 1. When using the subclock oscillator, wire as follows in the area enclosed by the broken lines in
the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as V
SS
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. The subclock oscillator is designed as a low-amplitude circuit for reducing power consumption,
and is more prone to malfunction due to noise than the main clock oscillator. Particular care is
therefore required with the wiring method when the subclock is used.
PLL Characteristics (T
A
=
40 to
+
85
°
C, V
DD
= 2.7 to 5.5 V, V
SS
= 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input frequency
f
X
2
5
MHz
Output frequency
f
XX
8
20
MHz
Lock time
t
PLL
After V
DD
reaches 2.7 V (MIN.)
200
μ
s
XT2
XT1
External clock
XT2
XT1