CHAPTER 14 A/D CONVERTER
User’s Manual U16890EJ1V0UD
423
The following describes how to set registers.
When using the A/D converter for A/D conversion
<1> Set (1) the ADM.ADCS2 bit.
<2> Select the channel and conversion time by setting the ADS.ADS2 to ADS.ADS0 bits and the ADM.FR2
to ADM.FR0 bits.
<3> Set (1) the ADM.ADCS bit.
<4> Transfer the A/D conversion data to the ADCR register.
<5> An interrupt request signal (INTAD) is generated.
<Changing the channel>
<6> Change the channel by setting the ADS2 to ADS0 bits.
<7> Transfer the A/D conversion data to the ADCR register.
<8> An interrupt request signal (INTAD) is generated.
<Ending A/D conversion>
<9> Clear (0) the ADCS bit.
<10> Clear (0) the ADCS2 bit.
Cautions 1. The time taken from <1> to <3> must be 17
μ
s (14
μ
s when AV
REF0
≥
4.0 V) or longer.
2. Steps <1> and <2> may be reversed.
3. Step <1> may be omitted. However, if omitted, do not use the first conversion result
after <3>.
4. The time taken from <4> to <7> is different from the conversion time set by the FR2 to
FR0 bits.
The time taken for <6> and <7> is the conversion time set by the FR2 to FR0 bits.
When using the A/D converter for the power fail function
<1> Set (1) the PFM.PFEN bit.
<2> Set the power fail comparison conditions by using the PFM.PFCM bit.
<3> Set (1) the ADM.ADCS2 bit.
<4> Select the channel and conversion time by setting the ADS.ADS2 to ADS.ADS0 bits and the ADM.FR2
to ADM.FR0 bits.
<5> Set the threshold value in the PFT register.
<6> Set (1) the ADM.ADCS bit.
<7> Transfer the A/D conversion data to the ADCR register.
<8> Compare the ADCR register with the PFT register. An interrupt request signal (INTAD) is generated
when the conditions match.
<Changing the channel>
<9> Change the channel by setting the ADS2 to ADS0 bits.
<10> Transfer the A/D conversion data to the ADCR register.
<11> The ADCR register is compared with the PFT register. When the conditions match, an INTAD signal is
generated.
<Ending A/D conversion>
<12> Clear (0) the ADCS bit.
<13> Clear (0) the ADCS2 bit.