TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
82
Agere Systems Inc.
8 TMUX Registers
(continued)
Table 92. TMUX_RHS_DLT, Delta/Event (COR/COW)
(continued)
Address
Bit
Name
Function
Reset
Default
0
0x40006
7
TMUX_RF1MOND
Receive F1 Monitor Delta.
This delta bit indicates a change in
state of TMUX_RF1MON0[7:0] and TMUX_RF1MON1[7:0]
(
Table 111 on page 102
) when a consistent new value is
detected in the incoming F1 byte for TMUX_CNTDF1[3:0]
(
Table 108 on page 100
) continuous frames. The current value is
stored in TMUX_RF1MON0[7:0], and the previous value is
stored in TMUX_RF1MON0[7:0]. The mask bit is
TMUX_RF1MONM (
Table 96 on page 90
).
TMUX_RTIMSD
Receive Section Trace Identifier Mismatch Delta.
This delta
bit indicates a change in state in the received 16-byte J0
sequence of bytes if the J0 mode is programmed to receive a 16-
byte sequence. The mask bit is TMUX_RTIMSM (
Table 96 on
page 90
).
TMUX_RHSSFD
Receive High-Speed Signal Fail BER Algorithm Delta.
This
delta bit indicates a change of state for the signal fail BER algo-
rithm state bit TMUX_RHSSF (
Table 101 on page 94
). The mask
bit for this delta bit is TMUX_RHSSFM (
Table 96 on page 90
).
TMUX_RHSSDD
Receive High-Speed Signal Degrade BER Algorithm Delta.
This delta bit indicates a change of state for the signal degrade
BER algorithm state bit TMUX_RHSSD (
Table 101 on page 94
).
The mask bit is TMUX_RHSSDM (
Table 96 on page 90
).
TMUX_RHSLOSD
Receive High-Speed Loss of Signal Delta.
This delta bit
indicates a change in state of either TMUX_RHSLOS (
Table 101
on page 94
) or TMUX_RHSLOSEXTI (
Table 101 on page 94
).
TMUX_RHSLOSEXTI is an external input from a device pin.
TMUX_RHSLOS is an internally generated state bit based on
monitoring for a consecutive 0/1s pattern in the data input. The
mask bit is TMUX_RHSLOSM (
Table 96 on page 90
).
TMUX_RHSLOFD
Receive High-Speed Loss of Frame Delta.
This delta bit indi-
cates a change in state of TMUX_RHSLOF (
Table 101 on
page 94
). The mask bit is TMUX_RHSLOFM (
Table 96 on
page 90
).
TMUX_RHSOOFD
Receive High-Speed Out of Frame Delta.
This delta bit indi-
cates a change in state of TMUX_RHSOOF (
Table 101 on
page 94
). The mask bit is TMUX_RHSOOFM (
Table 96 on
page 90
).
TMUX_RHSILOCD
Receive High-Speed Loss of Input Clock Delta.
This delta bit
indicates a change in state of the TMUX_RHSILOC (
Table 101
on page 94
) state bit. The mask bit is TMUX_RHSILOCM
(
Table 96 on page 90
).
6
0
5
0
4
0
3
0
2
0
1
0
0
0