
Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
153
Agere Systems Inc.
9 SPE Mapper Registers
(continued)
9.2 SPE Mapper Register Map
Note:
In Table 179, the reset default of all reserved bits is 0. Shading denotes reserved bits.
Table 179. SPE Mapper Register Map
Address
Symbol
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPE Version and Identification Registers—RO
0x30000
Page 136
SPE_
VERSION_R
SPE_VERSION[2:0]
SPEMPR_ID[7:0]
0x30001
Page 136
RSVD
One Shot (0 to 1 transition) Control Bit Parameters—R/W
0x30002
Page 136
SPE_
ONESHOT
SPE_
BIPOL_ERR
SPE_
SFCLEAR
SPE_
SFSET
SPE_
SDCLEAR
SPE_SDSET
Delta and Event Parameters—COR/COW
0x30003
Page 136
SPE_EVENT1 SPE_RX_
ESOVUN_
E
SPE_TX_
ESOVUBN_
E
SPE_
K3DMOND
SPE_
N1DMOND
SPE_
C2DMOND
SPE_
F2DMOND
SPE_
F3DMOND
0x30004
Page 137
SPE_EVENT2
SPE_PRDI
DMOND
SPE_RNDFE SPE_RDECE SPE_RINCE SPE_RAISD
SPE_
RLOPD
SPE_SFB3D SPE_SDB3D
SPE_
RUNEQD
SPE_
RPLMD
SPE_RTIMD
0x30005
Page 137
SPE_EVENT3
SPE_RSY5
2LOSD
SPE_
RV1LOSD
SPE_
RSPELOSD
SPE_RJ0J1
V1LOSD
SPE_RDS3
LOCD
SPE_
RC52LOCD
SPE_
RLSLOCD
SPE_
TSY52LOSD
SPE_
TV1LOSD
SPE_
TSPELOSD
SPE_TJ0J1V
1LOSD
SPE_
TDS3LOCD
SPE_
TC52LOCD
SPE_
TLSLOCD
Interrupt Mask Parameters for INT Pins—R/W
0x30006
Page 138
SPE_MASK1
SPE_RX_
ESOVUN_
IM
SPE_TX_
ESOVUN_
IM
SPE_
RDATA_PM
SPE_
TPOAC_PM
SPE_
K3DMONM
SPE_
N1DMONM
SPE_
C2DMONM
SPE_
F2DMONM
SPE_
F3DMONM
0x30007
Page 138
SPE_MASK2
SPE_PRDI
DMONM
SPE_RNDFM
SPE_
RDECM
SPE_RINCM SPE_RAISM
SPE_
RLOPM
SPE_
SFB3M
SPE_
SDB3M
SPE_
RUNEQM
SPE_
RPLMM
SPE_
RTIMM
0x30008
Page 138
SPE_MASK3
SPE_RSY5
2LOSM
SPE_
RV1LOSM
SPE_
RSPELOSM
SPE_RJ0J1
V1LOSM
SPE_RDS3
LOCM
SPE_
RC52LOCM
SPE_
RLSLOCM
SPE_
TSY52LOSM
SPE_
TV1LOSM
SPE_
TSPELOSM
SPE_TJ0J1V
1LOSM
SPE_
TDS3LOCM
SPE_
TC52LOCM
SPE_
TLSLOCM
State and Value Parameters—RO
0x30009
Page 140
SPE_STATE1
SPE_RAIS
SPE_RLOP
SPE_SFB3
SPE_SDB3
SPE_
RUNEQ
SPE_RPLM
SPE_RTIM
0x3000A
Page 140
SPE_STATE2
SPE_
RSY52LOS
SPE_
RV1LOS
SPE_
RSPELOS
SPE_RJ0J1
V1LOS
SPE_
RDS3LOC
SPE_
RC52LOC
SPE_
RLSLOC
SPE_
TSY52LOS
SPE_
TV1LOS
SPE_
TSPELOS
SPE_
TJ0J1V1LOS
SPE_
TDS3LOC
SPE_
TC52LOC
SPE_
TLSLOC
Receive Control Parameters for Alarm and Overhead Functions—R/W
0x3000B
Page 141
SPE_RAOH_
CTL1
SPE_RD_
OEPAR
SPE_J1MONMODE[2:0]
SPE_RPRDI_
MODE
SPE_G1BTB
LKCNT
SPE_B3BT
BLKCNT
SPE_RPOAC_
OEPINS
0x3000C
Page 141
SPE_RAOH_
CTL2
SPE_CNTDLOPCNT[1:0]
SPE_8ORMA
JORITY
SPE_
PAISINS
SPE_PAIS_
AISINH
SPE_PAIS_
LOPINH
SPE_PAIS_
SFB3INH
SPE_PAIS_
SDB3INH
SPE_PAIS_
UNEQINH
SPE_PAIS_
PLMINH
SPE_PAIS_
TIMINH
0x3000D
Page 142
SPE_RAOH_
CTL3
SPE_PH_
DET_INV
SPE_AIS_
LOSSY52INH
SPE_AIS_
LOSV1INH
SPE_AIS_
LOSSPEINH
SPE_AIS_LO
SJ0J1V1INH
SPE_AIS_
LOCDS3INH
SPE_AIS_
LOC52INH
SPE_AIS_
LOCINH