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參數(shù)資料
| 型號(hào)： | HMS30C7202N |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Highly-intergrated MPU |
| 中文描述： | 高intergrated微處理器 |
| 文件頁(yè)數(shù)： | 179/179頁(yè) |
| 文件大?。?/td> | 2127K |
| 代理商： | HMS30C7202N |
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HMS30C7202N
2004 MagnaChip Semiconductor Ltd. All Rights Reserved. Version 1.1
- 174 -
13
13.1
Deep-sleep, Wake-up Issues of HMS30C7202 PMU
APPENDIX
13.1.1
Wake-up
HMS30C7202 has four external wake-up sources, and at least one of two power condition pins
(PMADAPOK, PMBATOK) should be high. MRING (nURING), nPMWAKEUP, RTC event can not be
masked. PMU only has interrupt mask bits for interrupt controller. It means even though HMS30C7202
wake-up from deep-sleep, there might be no interrupt for interrupt controller. But every time,
HMS30C7202 would wake up when any one of wake-up sources asserted.
-
Wake-up sources
MRING
: It’s connected nURING pin (“n” of nURING pin means “l(fā)ow active”)
This signal can not be masked in PMU.
HOTSYNC
: HotSync condition or user defined condition (ex. Plugging power adaptor)
This signal is connected with GPIOB[10] interrupt.
nRESET
: nRESET signal wake up from deep-sleep.
nPMWAKEUP
: active low external signal. This signal can not be masked.
RTC Event
: from RTC. This signal isn’t able to mask in PMU.
All wake-up sources are filtered by debounce circuit (except RTC) with 250Hz clock from RTC
clock source, so if RTC clock stopped, wake-up sequence would not work.
-
Needed condition for wake-up
One of PMADAPOK and PMBATOK should be high, it means there’s no power problem.
If user wants to make wake-up regardless power source condition, set “WAKEUP” bit of PMU
Mode register (PMUMODE) bit [3].
13.1.2
Deep-sleep
-
condition, 7202 would not go into “deep-sleep mode”.
-
Once Deep-sleep mode is set (in Slow mode) and no wake-up signal condition, State machine
wait, until
Bus Idle
state. And after state machine jump into
Bus Idle
, in the very next “bus access”
operation, PMU get bus mastership from CPU and state machine keep going into deep-sleep mode
through short sleep state. Sometimes S/W need to wait until
Bus Idle
(ex. DMA cases) and to
prevent un-wanted next instruction execution after deep-sleep instruction set PMU Mode
Register(PMUMODE), usually dummy loop is used for this purpose.
To go deep-sleep state, all wake-up conditions are cleared. If any wake-up pin stays in wake-up
-
of a peripheral register) access is helpful after dummy loop. We think it is related with changing bus
mastership. (or may need longer dummy loop) But we can’t sure it.
In some cases (in some S/W), to keep going into deep-sleep, dummy bus (ex. just single read
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