![](http://datasheet.mmic.net.cn/280000/HMS30C7202N_datasheet_16073790/HMS30C7202N_113.png)
HMS30C7202N
2004 MagnaChip Semiconductor Ltd. All Rights Reserved. Version 1.1
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Bits
0
Type
R/W
Function
When TicSel is HIGH, there is 3 Port registers (B, D, F) access to check up special word.
TicSelWR is enabling the TICTMDR and PSTB is clock signal. So TicSel data output is PD[0]
bit.
10.2.2.42
PORTA Multi-function Select register(AMULSEL)
0x8002.30A4
0
15
AMULSEL
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
GPIO PORT A[15] Multi-function Select 1: IRIN 0: GPIO or Primary
GPIO PORT A[14] Multi-function Select 1: USOUT3 0: GPIO or Primary
GPIO PORT A[13] Multi-function Select 1: USIN3 0: GPIO or Primary
GPIO PORT A[12] Multi-function Select 1: ISECK 0: GPIO or Primary
GPIO PORT A[11] Multi-function Select 1: ISWS 0: GPIO or Primary
GPIO PORT A[10] Multi-function Select 1: PORT A[10] output 0: GPIO or Primary
GPIO PORT A[9] Multi-function Select 1: PORT A[9] output 0: GPIO or Primary
GPIO PORT A[8] Multi-function Select 1: PORT A[8] output 0: GPIO or Primary
GPIO PORT A[7] Multi-function Select 1: IROUT 0: GPIO or Primary
GPIO PORT A[6] Multi-function Select 1: USOUT2 0: GPIO or Primary
GPIO PORT A[5] Multi-function Select 1: USIN2 0: GPIO or Primary
GPIO PORT A[4] Multi-function Select 1: ISCLK 0: GPIO or Primary
GPIO PORT A[3] Multi-function Select 1: ISD 0: GPIO or Primary
GPIO PORT A[2] Multi-function Select 1: PORT A[2] output 0: GPIO or Primary
GPIO PORT A[1] Multi-function Select 1: PORT A[1] output 0: GPIO or Primary
GPIO PORT A[0] Multi-function Select 1: PORT A[0] output 0: GPIO or Primary
10.2.2.43
SWAP Pin Configuration Register(SWAP)
0x8002.30A8
0
SWAP
Bits
0
Type
R/W
Function
SWAP determines PORT E Pin configuration. When reset, USB transceiver signals, SMC and
RA24 will be available. Otherwise, USB transceiver, SMC will be available while RA 24 cannot
be used so addressing space reduced by half.
10.2.3
GPIO Interrupt
GPIO has 7 interrupt sources. Each port can be configured as 1 interrupt source except port B. To use a GPIO
port as interrupt source, specify edge register polarity register according to interrupt type, for example, low
level sensitive or rising edge sensitive, etc. then set mask register to enable interrupt. Port B has 3 interrupt
sources, PORTB[11], PORTB[10] and PORTB[9:0]. PORTB[11] is assigned to make CPU go to deep sleep
mode, PORTB[10] is to detect Hotsync. PORTB[9:0] is used as general GPIO interrupt source. So, following
chart shows available GPIO interrupts.
Interrupt Name
Configurable Bits
GPIOAINTR
PORTA[15:0]
GPIOB0INTR
PORTB[10], Hotsync Interrupt
GPIOB1INTR
PORTB[11], Deep Sleep Interrupt
GPIOBINTR
PORTB[9:0]
GPIOCINTR
PORTC[10:0]
GPIODINTR
PORTD[8:0]
GPIOEINTR
PORTE[24:0]