19-4750; Rev 1; 07/11 61 of 194 9.3.2.3.11 “CPU Debug RXP PW Bundle” Setting (
參數(shù)資料
型號: DS34S132GN+
廠商: Maxim Integrated Products
文件頁數(shù): 153/194頁
文件大小: 0K
描述: IC TDM OVER PACKET 676-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
功能: TDM-over-Packet(TDMoP)
接口: TDMoP
電路數(shù): 1
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應(yīng)商設(shè)備封裝: 676-PBGA(27x27)
包裝: 管件
其它名稱: 90-34S13+2N0
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁當(dāng)前第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁
DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
61 of 194
9.3.2.3.11 “CPU Debug RXP PW Bundle” Setting (RXBDS)
PW Bundles (not including OAM Bundles) are normally used for SAT, CES, HDLC or PW-Timing Connections, but
can be programmed to instead send packets to the CPU for debug. When the CPU Debug setting is enabled
(B.BCDR4.RXBDS), the received packets for the RXP Bundle are redirected to the CPU (instead of sending the
data to the SAT/CES/HDLC/Clock Recovery Engines). The RXP Bundle parameters can be fully programmed or
partially programmed. A received packet is identified as a “CPU Debug RXP PW Bundle” packet when the packet
includes any of the PW Header Types, the PW-ID of the packet matches a BID and the Bundle that uses that BID is
programmed to “CPU Debug” (RXBDS). The other Bundle register settings are ignored.
9.3.2.3.12 PW Bundle with Unknown UDP Protocol Type (UPVCE and DPS5)
When the Classifier is programmed to verify the UDP Payload Protocol (PC.CR1.UPVCE) and a UDP packet is
received with a recognized BID, but with a UDP Payload Protocol value that is not equal to PC.CR2.UPVC1 or
UPVC2, PC.CR1.DPS5 selects whether the packet is sent to the CPU (0) or Discarded (1). The DPS5 setting does
not affect packets that are otherwise identified as CPU packets.
9.3.2.3.13 PW Bundle In-band VCCV OAM (RXOICWE and DPS7)
In-band VCCV CPU Connections can be thought of as “secondary” connections that are used to support the
“primary” SAT/CES/HDLC/Clock Only PW for functions like setup, configuration and monitoring. An In-band VCCV
connection can be established before the primary connections have been established. The In-band VCCV may be
used, e.g., to negotiate the configuration settings of the primary connection before enabling the primary connection.
The Classifier monitors for In-band VCCV packets for a Bundle when B.BCDR4.RXOICWE = 1. The PC.CR1.DPS7
setting determines whether In-band VCCV packets are forwarded to the CPU (0) or Discarded (1).
9.3.2.3.14 PW Bundle with Too Many MPLS Labels (DPS10)
When an MFA-8 (MPLS) packet is received with a recognized BID and the packet includes more than 2 MPLS
Labels, PC.CR1.DPS10 determines whether the packet is forwarded to the CPU (0) or Discarded (1).
9.3.2.3.15 PW OAM Bundle - Out-band VCCV OAM Packets (DPS7)
Up to 32 Out-band VCCV OAM Connections can be programmed using OAM BIDs. OAM BIDs are used to support
what the standards call “UDP-specific OAM”, “Out-band VCCV” or “OAM using Separate PW-ID” (meaning OAM
PW-IDs that are separate/unique from the PW-IDs used by the primary PW connection). The UDP application
commonly uses this OAM form instead of the “In-band VCCV” form. This OAM format is not commonly used with
L2TPv3, MEF-8 or MFA-8. A packet is recognized as an OAM Bundle when the received packet includes a one of
the PW Header Types and the received PW-ID matches one of the 32 programmed OAM BIDs. The PC.CR1.DPS7
setting determines whether this packet type is forwarded to the CPU (0) or Discarded (1).
9.3.3 TXP Packet Generation
The TXP Packet Generator schedules the packet data for CPU, PW-Timing, HDLC and SAT/CES Payload
Connections and appends the TXP Header (including FCS field values when required) and TXP Timestamp (when
required). The Ethernet FCS is appended outside this block in the Ethernet MAC block.
Figure 9-24. TXP Packet Generation Environment
DS34S132
Ethernet
MAC
SAT/CES Connection
HDLC Connection
TXP Timing Connection
TXP SAT/CES Payload data from
Buffer Manager
TXP HDLC Payload data from
Buffer Manager
TXP RTP Timestamp
information from Buffer Manager
TXP Pkt
Scheduling &
Generation
RXP CPU Queue packets from Buffer Manager
CPU Connection
相關(guān)PDF資料
PDF描述
DS34T102GN+ IC TDM OVER PACKET 484TEBGA
DS3501U+H IC POT NV 128POS HV 10-USOP
DS3502U+ IC POT DGTL NV 128TAP 10-MSOP
DS3503U+ IC POT DGTL NV 128TAP 10-MSOP
DS3897MX IC TXRX BTL TRAPEZIODAL 20-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS34S132GN+ 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
DS34S132GNA2+ 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube
DS34T101 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip
DS34T101_08 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip
DS34T101_09 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip