![](http://datasheet.mmic.net.cn/370000/TVP3026-135_datasheet_16743199/TVP3026-135_48.png)
2–34
2.7.4
The cursor supports an interlaced display when bit CCR5 in the cursor control register is set to 1. For the
purposes of this discussion assume that the interlaced display consists of an even field of scan lines
numbered 0, 2, 4, . . ., etc., and an odd field of scan lines numbered 1, 3, 5, . . ., etc. Scan line 0 is the first
scan line at the top of the display. When interlaced mode is enabled and cursor position y (CPy) is greater
than 64 (0x40) and less than or equal to 4095 (0xFFF), the first cursor line displayed depends on the state
of the ODD/EVEN terminal and value of CPy.
When CPy is an even number, the data in row 0 of the cursor RAM array is displayed during the even field
(ODD/EVEN = 0), followed by rows 2, 4, . . ., 62 on successive scan lines. The data in row 1 of the cursor
RAM array is displayed during the odd field (ODD/EVEN = 1), followed by rows 3, 5, . . ., 63 on successive
scan lines.
When CPy is an odd number, the data in row 0 of the cursor RAM array is displayed during the odd field
(ODD/EVEN = 1), followed by rows 2, 4, . . ., 62 on successive scan lines. The data in row 1 of the cursor
RAM array is displayed during the even field (ODD/EVEN = 0), followed by rows 3, 5, . . ., 63 on successive
scan lines.
When CPy is between 0 and 64 (0x40), the cursor is partially off the top of the screen. In this case, the data
in the first displayed row of the cursor RAM (row N) is always displayed on scan line 0, which is the first scan
line of the even field, followed by rows N + 2, N + 4, . . ., etc. on successive scan lines. The data in row
N + 1 is displayed on scan line 1, which is the first scan line of the odd field, followed by cursor rows
N + 3, N + 5, . . ., etc. on successive scan lines.
The CCR6 bit of the cursor control register allows the polarity of the received ODD/EVEN signal to be
inverted when set to 1.
2.8
Port-Select and Color-Key Switching
The TVP3026 provides two integrated mechanisms for switching between direct-color images and overlay
graphics or between direct-color images and gamma-corrected true-color images midscreen. The
port-select function utilizes the external PSEL terminal to enable the display of multiple true-color or overlay
and direct-color on screen. The color-key switching function combines images on screen based on color
comparison with stored color range registers.
The port-select function is controlled by the miscellaneous-control register (index: 0x1E, see subsection
2.15.2, Miscellaneous-Control Register for register bit definitions). For switching between direct-color and
true-color, a true-color mode must be selected from Table 2–17. For switching between direct-color and
overlay, a direct-color mode must be selected from Table 2–17 and the VGA port must be disabled (MCR7
= 0). Overlay switching is not supported for those direct-color modes that do not have overlay capability. In
all cases, the color-key switching function should be disabled and direct-color (CKC4 = CKC3 = CKC2 =
CKC1 = CKC0 = 0) selected. The miscellaneous-control register enables the port-select function and
defines the polarity of PSEL. Since PSEL is sampled with LCLK, the granularity for port-select switching
depends on the number of pixels loaded for each LCLK.
The color-key switching function is controlled by the color-key-control register (index: 0x38, see subsection
2.15.7, Color-Key Control Register for register definition). For switching between direct-color and true-color,
a true-color mode must be selected from Table 2–17. The incoming red, green, and blue color fields are
compared with their respective color range registers before gamma correction occurs. The overlay terminals
could also be used for the color comparison, although the overlay information is not displayable in true-color
mode. For switching between direct-color and overlay, a direct color mode must be selected from Table 2–17
and the VGA port must be disabled (MCR7 = 0). In all cases, the port-select function should be disabled
and direct-color(MSC5 = 1, MSC4 = 0) selected. The color-key control register enables/disables the red,
green, blue, and/or overlay range comparators and defines the polarity of the color-key switching function.
The comparison values are then written to the eight 8-bit color-key-range registers; color key overlay (low,
high), color key red (low, high), color key green (low, high), and color key blue (low, high). These registers
are accessed through index 0x30 through index 0x37. The granularity for color-key switching is on a
pixel-by-pixel basis.
Interlaced Cursor Operation