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參數(shù)資料
| 型號： | TVP3026-220 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器) |
| 中文描述： | 視頻接口調(diào)色板Exract（組合像素模式視頻接口調(diào)色器） |
| 文件頁數(shù)： | 17/107頁 |
| 文件大?。?/td> | 707K |
| 代理商： | TVP3026-220 |
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2–3
Table 2–2. Indirect Register Map (Extended Registers) (Continued)
INDEX
R/W
DEFAULT
REGISTER ADDRESSED
BY INDEX REGISTER
0x3D
R
XX
CRC Remainder MSB
0x3E
W
XX
CRC Bit Select
0x3F
R
0x26
ID
0xFF
W
XX
Software Reset
NOTE 1: Reserved registers should be avoided; otherwise, circuit behavior
could deviate from that specified.
2.1.1
The 8/6 terminal is used to select between an 8-bit (set to 1) or 6-bit (reset to 0) data path to the color palette
RAM and it is provided in order to maintain compatibility with the INMOS IMSG176. When
miscellaneous-control register bit 2 (MSC2) is set to 1, the 8/6 terminal is disabled and 8/6 operation is
controlled by bit 3 of the miscellaneous-control register (MSC3). The reset default is for the 8/6 terminal to
be enabled (miscellaneous-control register bit 2 = 0, see Section 2.2, Color Palette RAM).
8/6 Operation
2.1.2
The pixel read-mask register (direct register: 0010) is an 8-bit register used to enable or disable a bit plane
from addressing the color-palette RAM in the pseudo-color and VGA modes. Each palette address bit is
logically ANDed with the corresponding bit from the read-mask register before going to the palette-page
register and addressing the palette RAM.
Pixel Read-Mask Register
2.1.3
The palette page register (index: 0x1C) allows selection of multiple color look-up tables stored in the palette
RAM when using a mode that addresses the palette RAM with less than 8 bits. When using 1, 2, or 4 bit
planes in the pseudo-color or direct-color + overlay modes, the additional planes are provided from the page
register before the data addresses the color palette. This is illustrated in Table 2–3.
Palette-Page Register
NOTE
The additional bits from the page register are inserted after the read mask.
The palette-page register specifies the additional bit planes for the overlay field in
direct-color modes with less than 8 bits per pixel overlay.
Table 2–3. Allocation of Palette-Page Register Bits
NUMBER OF BIT PLANES
MSB
PALETTE ADDRESS BITS
LSB
8
M
M
M
M
M
M
M
M
4
P7
P6
P5
P4
M
M
M
M
2
P7
P6
P5
P4
P3
P2
M
M
1
P7
P6
P5
P4
P3
P2
P1
M
M = bit from pixel port and Pn = n bit from page register.
相關(guān)PDF資料 |
PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3026-220AMDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3026-220APCE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3026-220BMDN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
| TVP3026-220BPCE | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3026-220MDN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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