參數(shù)資料
型號(hào)： TVP3026-220
廠商： Texas Instruments, Inc.
英文描述： Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
中文描述： 視頻接口調(diào)色板Exract（組合像素模式視頻接口調(diào)色器）
文件頁(yè)數(shù)： 35/107頁(yè)
文件大?。?/td> 707K
代理商： TVP3026-220
2–21
NOTES
Since less than 8 bits are defined for each color in the various 12- or 16-bit direct-
or true-color modes, the data bits for the individual colors are internally shifted to
the MSB locations and the remaining LSB locations for each color are set to 0
before 8-bit data is sent to the DACs.
Since the overlay information goes through the pseudo-color data path, it is subject
to read masking and the palette-page register. This is especially important for those
direct-color modes that have less than eight bits of overlay information. The overlay
information in these modes justifies to the LSB positions, and the remaining MSB
positions are filled with the corresponding palette-page data before addressing the
palette RAM.
In order to display true color (gamma corrected through the palette), the port select
function or the color-key switching function must be set for palette graphics. For
direct color, both functions must be set for direct color.
When in the 24-bit direct-color or true-color modes, the data input works only in the
8-bit mode. In other words, when only six bits are used, the two LSB inputs for each
color need to be tied to GND. However, the palette, which is used by the overlay
input, is still governed by the 8/6 function, and the output multiplexer selects 8 bits
or 6 bits of data accordingly. The 8/6 function is also valid in the other 16-bit modes.
The default condition after reset is for the port select function to be disabled and
selecting palette graphics (MSC4 = MSC5 = 0) The default condition for
the color key function is to be disabled and selecting direct-color graphics
(CKC4 = CKC3 = CKC2 = CKC1 = CKC0 = 0). The overall effect is to default to
palette graphics since the two are combined by a logical OR function. Also since
MCR7 = 1 at reset, the VGA port is selected.
Packed-24 Mode
The packed-24 mode provides for more efficient use of the frame buffer. For example, a 1280 x 1024 x
24 bpp display may be implemented using 4 Mbytes of VRAM. Without packed-24, this can require 6 or 8
Mbytes of VRAM. Packed-24 modes can be used with direct-color (color palette bypass) or with true-color
(gamma correction). The color depth is 24 bit/pixel and data may be arranged as R-G-B or B-G-R. Overlay
fields are not available. Either a 64-bit pixel bus or a 32-bit pixel bus may be used. The 64-bit pixel bus
supports 8:3 packed-24 (8 pixels per 3 LCLKs) and 5:2 packed-24 (5 pixels per 2 LCLKs). The 32-bit pixel
bus supports 4:3 packed-24 (4 pixels per 3 LCLKs) and 5:4 packed-24 (5 pixels per 4 LCLKs). See Tables
2–19 and 2–20 for data formats.
2.6.6
The loop clock PLL must be set up to generate RCLK at the proper frequency which can be 3/8, 2/5, 3/4,
or 4/5 of the dot clock frequency for the multiplexing ratios given above. Since the RCLK is PLL-synthesized,
a 50% duty cycle RCLK is generated. As compared to other packed-pixel palette DACs, which generate the
RCLK waveform using a digital state machine, the TVP3026 provides a longer RCLK period for a given dot
clock frequency. This means a higher screen refresh rate is possible using VRAM of the same speed grade.
For example, for the 8:3 packed-24 mode, the RCLK PLL must be set to output a clock that is 3/8 the
frequency of the pixel clock. For a 1280 x 1024 display at 135 MHz pixel rate, a 50.6 MHz VRAM serial clock
rate can be used. See subsection 2.4.3, Loop Clock PLL for a description of the loop clock PLL.
Packed-24 operation using the SCLK timing mode must limit the RCLK-to-LCLK loop delay to the specified
maximum delay. The following constraints apply to packed-24 mode:
The number of LCLKs (pixel bus loads) during the active portion of the horizontal line must be
a multiple of the number of LCLKs for each pixel group, i.e., a multiple of 3 for 8:3 packed-24
mode.
The number of LCLKs during the total horizontal line (active + blanked) must be a multiple of the
number of LCLKs for each pixel group.
相關(guān)PDF資料
PDF描述
TVP3026-250 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
TX24 60.8 MM 5 X 8 DOT MATRIX DISPLAYS
TXB0102DCTR 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTO DIRECTION SENSING AND 【15-kV ESD PROTECTION
TXB0102DCTT 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTO DIRECTION SENSING AND 【15-kV ESD PROTECTION
TZX7V5D surface mount silicon Zener diodes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP3026-220AMDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3026-220APCE 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3026-220BMDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
TVP3026-220BPCE 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3026-220MDN 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
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