參數(shù)資料
型號(hào)： TVP3026-220
廠商： Texas Instruments, Inc.
英文描述： Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
中文描述： 視頻接口調(diào)色板Exract（組合像素模式視頻接口調(diào)色器）
文件頁(yè)數(shù)： 37/107頁(yè)
文件大?。?/td> 707K
代理商： TVP3026-220
2–23
2.6.7
The pixel port multiplexer is controlled by two 8-bit registers in the indirect register map (see Table 2–2). The
various multiplexing modes can be selected according to Table 2–17.
Multiplex-Control Registers
NOTES
For all modes utilizing VGA7–VGA0, MCR6 should be set to 0, When MCR6 is reset
to 0, VGABL, VGAVS, VGAHS are used and these video controls and
VGA7–VGA0 are latched by CLK0. This is referred to as VGA mode 2. VGA
mode 2 supports most graphics accelerators with integrated VGA and also
supports add-on graphics boards that receive the VGA pseudo-color data from a
separate VGA controller using a feature connector. VGA mode 2 is active at power
up and after reset, and is fully functional without any software intervention. VGA
data and video controls are received with a synchronous VGA clock.
For all modes, true-color control register bit TCR5 selects one of two timing modes
for the blanking pipelining and pixel bus timing. See Figures 2–5 and 2–6
.
When bit TCR5 is set to 0 (default) it is assumed that the VRAM shift clock is
sourced by the graphics accelerator, and that SCLK from the TVP3026 is not being
used. In this case, the first sample of blanking (SYSBL or VGABL) inactive and the
first pixel group latched into P63–P0 are assumed to coincide on the same rising
edge of LCLK.
When bit TCR5 is set to 1, it is assumed that SCLK is used as the VRAM shift clock.
In this case, the TVP3026 must first sample blanking in order to start toggling SCLK
and then latch the first pixel group into P63–P0. Therefore, the TVP3026 assumes
there will be a 2-LCLK delay between the first sample of blanking inactive and the
latching of the first pixel group by LCLK. In this case, the TVP3026 inserts additional
pipeline delays to align the internal blanking signal with the pixel data at the DACs.
It is recommended that all unused input terminals be connected to ground to
conserve power.
相關(guān)PDF資料
PDF描述
TVP3026-250 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
TX24 60.8 MM 5 X 8 DOT MATRIX DISPLAYS
TXB0102DCTR 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTO DIRECTION SENSING AND 【15-kV ESD PROTECTION
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TZX7V5D surface mount silicon Zener diodes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP3026-220AMDN 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Video Interface Palette
TVP3026-220APCE 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Video Interface Palette
TVP3026-220BMDN 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Video Interface Palette
TVP3026-220BPCE 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3026-220MDN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
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