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參數(shù)資料
| 型號(hào)： | PI7C9X7954AFDE |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 45/70頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE-TO-UART BRIDGE 128LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 應(yīng)用： | PCIe至UART橋接 |
| 接口： | 高級(jí)配置電源接口（ACPI） |
| 電源電壓： | 1.8V, 3.3V |
| 封裝/外殼： | 128-LQFP 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 安裝類型： | 表面貼裝 |
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PI7C9X7954
PCI Express Quad UART
Datasheet
Page 5 of 70
May 2013 – Revision 1.4
Pericom Semiconductor
6.2.14.
CAPABILITIES POINTER REGISTER – OFFSET 34h.........................................................29
6.2.15.
INTERRUPT LINE REGISTER – OFFSET 3Ch....................................................................29
6.2.16.
INTERRUPT PIN REGISTER – OFFSET 3Ch ......................................................................29
6.2.17.
POWER MANAGEMENT CAPABILITY ID REGISTER – OFFSET 80h...............................29
6.2.18.
NEXT ITEM POINTER REGISTER – OFFSET 80h..............................................................29
6.2.19.
POWER MANAGEMENT CAPABILITIES REGISTER – OFFSET 80h ................................29
6.2.20.
POWER MANAGEMENT DATA REGISTER – OFFSET 84h ...............................................30
6.2.21.
PPB SUPPORT EXTENSIONS – OFFSET 84h.....................................................................30
6.2.22.
PM DATA REGISTER – OFFSET 84h...................................................................................30
6.2.23.
MESSAGE SIGNALED INTERRUPTS (MSI) Capability ID Register 8Ch ...........................30
6.2.24.
MESSAGE SIGNALED INTERRUPTS (MSI) NEXT ITEM POINTER 8Ch ..........................31
6.2.25.
MESSAGE ADDRESS REGISTER – OFFSET 90h................................................................31
6.2.26.
MESSAGE UPPER ADDRESS REGISTER – OFFSET 94h ..................................................31
6.2.27.
MESSAGE DATA REGISTER – OFFSET 98h .......................................................................31
6.2.28.
VPD CAPABILITY ID REGISTER – OFFSET 9Ch ...............................................................31
6.2.29.
NEXT ITEM POINTER REGISTER – OFFSET 9Ch .............................................................31
6.2.30.
VPD REGISTER – OFFSET 9Ch ..........................................................................................31
6.2.31.
VPD DATA REGISTER – OFFSET A0h ................................................................................32
6.2.32.
VENDOR SPECIFIC CAPABILITY ID REGISTER – OFFSET A4h .....................................32
6.2.33.
NEXT ITEM POINTER REGISTER – OFFSET A4h .............................................................32
6.2.34.
LENGTH REGISTER – OFFSET A4h ...................................................................................32
6.2.35.
XPIP CSR0 – OFFSET A8h (Test Purpose Only) ..................................................................32
6.2.36.
XPIP CSR1 – OFFSET ACh (Test Purpose Only) .................................................................32
6.2.37.
REPLAY TIME-OUT COUNTER – OFFSET B0h .................................................................32
6.2.38.
ACKNOWLEDGE LATENCY TIMER – OFFSET B0h ..........................................................33
6.2.39.
UART DRIVER SETTING – OFFSET B4h ............................................................................33
6.2.40.
Power Management Control Parameter – OFFSET B8h ......................................................34
6.2.41.
DEBUG REGISTER 1 – OFFSET BCh (Test Purpose Only) ................................................34
6.2.42.
DEBUG REGISTER 2 – OFFSET C0h (Test Purpose Only) .................................................34
6.2.43.
DEBUG REGISTER 3 – OFFSET C4h (Test Purpose Only) .................................................34
6.2.44.
DEBUG REGISTER 4 – OFFSET C8h (Test Purpose Only) .................................................34
6.2.45.
GPIO CONTROL REGISTER – OFFSET D8h......................................................................34
6.2.46.
EEPROM CONTROL REGISTER – OFFSET DCh...............................................................35
6.2.47.
PCI EXPRESS CAPABILITY ID REGISTER – OFFSET E0h................................................35
6.2.48.
NEXT ITEM POINTER REGISTER – OFFSET E0h .............................................................35
6.2.49.
PCI EXPRESS CAPABILITIES REGISTER – OFFSET E0h .................................................35
6.2.50.
DEVICE CAPABILITIES REGISTER – OFFSET E4h...........................................................36
6.2.51.
DEVICE CONTROL REGISTER – OFFSET E8h .................................................................36
6.2.52.
DEVICE STATUS REGISTER – OFFSET E8h ......................................................................37
6.2.53.
LINK CAPABILITIES REGISTER – OFFSET ECh ...............................................................37
6.2.54.
LINK CONTROL REGISTER – OFFSET F0h.......................................................................38
6.2.55.
LINK STATUS REGISTER – OFFSET F0h ...........................................................................38
6.2.56.
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY ID REGISTER – OFFSET
100h
39
6.2.57.
CAPABILITY VERSION – OFFSET 100h ..............................................................................39
6.2.58.
NEXT ITEM POINTER REGISTER – OFFSET 100h............................................................39
6.2.59.
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h.....................................39
6.2.60.
UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h........................................40
6.2.61.
UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch ................................41
6.2.62.
CORRECTABLE ERROR STATUS REGISTER – OFFSET 110h...........................................42
6.2.63.
CORRECTABLE ERROR MASK REGISTER – OFFSET 114h .............................................42
6.2.64.
ADVANCE ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h.............43
6.2.65.
HEADER LOG REGISTER – OFFSET From 11Ch to 128h .................................................43
13-0093
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