Pericom Semiconductor BIT FUNCTION TYPE DESCRIPTION 13 Flow Co" />
參數(shù)資料
型號(hào)： PI7C9X7954AFDE
廠商： Pericom
文件頁(yè)數(shù)： 35/70頁(yè)
文件大?。?/td> 0K
描述： IC PCIE-TO-UART BRIDGE 128LQFP
標(biāo)準(zhǔn)包裝： 90
應(yīng)用： PCIe至UART橋接
接口： 高級(jí)配置電源接口（ACPI）
電源電壓： 1.8V, 3.3V
封裝/外殼： 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 128-LQFP（14x14）
包裝： 托盤
安裝類型： 表面貼裝
PI7C9X7954
PCI Express Quad UART
Datasheet
Page 40 of 70
May 2013 – Revision 1.4
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
13
Flow Control
Protocol Error
Status
RW1CS
When set, indicates that the Flow Control Protocol Error event has
occurred.
Reset to 0b.
14
Completion
Timeout Status
RW1CS
When set, indicates that the Completion Timeout event has occurred.
Reset to 0b.
15
Completer Abort
Status
RW1CS
When set, indicates that the Completer Abort event has occurred.
Reset to 0b.
16
Unexpected
Completion Status
RW1CS
When set, indicates that the Unexpected Completion event has
occurred.
Reset to 0b.
17
Receiver Overflow
Status
RW1CS
When set, indicates that the Receiver Overflow event has occurred.
Reset to 0b.
18
Malformed TLP
Status
RW1CS
When set, indicates that a Malformed TLP has been received.
Reset to 0b.
19
ECRC Error Status
RW1CS
When set, indicates that an ECRC Error has been detected.
Reset to 0b.
20
Unsupported
Request Error
Status
RW1CS
When set, indicates that an Unsupported Request event has occurred.
Reset to 0b.
31:21
Reserved
RO
Reset to 000h.
6.2.60. UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Training Error
Mask
RWS
When set, the Training Error event is not logged in the Header Log
register and not issued as an Error Message to RC either.
Reset to 0b.
3:1
Reserved
RO
Reset to 000b.
4
Data Link Protocol
Error Mask
RWS
When set, the Data Link Protocol Error event is not logged in the
Header Log register and not issued as an Error Message to RC either.
Reset to 0b.
11:5
Reserved
RO
Reset to 0000000b.
12
Poisoned TLP Mask
RWS
When set, an event of Poisoned TLP has been received or generated
is not logged in the Header Log register and not issued as an Error
Message to RC either.
Reset to 0b.
13
Flow Control
Protocol Error
Mask
RWS
When set, the Flow Control Protocol Error event is not logged in the
Header Log register and not issued as an Error Message to RC either.
Reset to 0b.
14
Completion
Timeout Mask
RWS
When set, the Completion Timeout event is not logged in the Header
Log register and not issued as an Error Message to RC either.
Reset to 0b.
15
Completer Abort
Mask
RWS
When set, the Completer Abort event is not logged in the Header Log
register and not issued as an Error Message to RC either.
Reset to 0b.
16
Unexpected
Completion Mask
RWS
When set, the Unexpected Completion event is not logged in the
Header Log register and not issued as an Error Message to RC either.
Reset to 0b.
13-0093
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