Pericom Semiconductor BIT FUNCTION TYPE DESCRIPTION 7 Rx Data " />
參數(shù)資料
型號: PI7C9X7954AFDE
廠商: Pericom
文件頁數(shù): 44/70頁
文件大?。?/td> 0K
描述: IC PCIE-TO-UART BRIDGE 128LQFP
標(biāo)準(zhǔn)包裝: 90
應(yīng)用: PCIe至UART橋接
接口: 高級配置電源接口(ACPI)
電源電壓: 1.8V, 3.3V
封裝/外殼: 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 128-LQFP(14x14)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X7954
PCI Express Quad UART
Datasheet
Page 49 of 70
May 2013 – Revision 1.4
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
7
Rx Data Error
RO
0b: No Rx FIFO error
1b: Rx FIFO error
Reset to 0b.
7.1.9.
MODEM STATUS REGISTER – OFFSET 06h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Delta CTS
RO
0b: No change in CTS input.
1b: Indicates the CTS input has changed state.
This bit is read-clear.
Reset to 0b.
1
Delta DSR
RO
0b: No change in DSR input.
1b: Indicates the DSR input has changed state.
This bit is read-clear.
Reset to 0b.
2
Trailing RI Edge
RO
0b: No change in RI input
1b: Indicates the RI input has changed state from the logic 0 to
the logic 1.
This bit is read-clear.
Reset to 0b.
3
Delta DCD
RO
0b: No change in DCD input
1b: Indicates the DCD input has changed state.
This bit is read-clear.
Reset to 0b.
4
CTS
RO
0b: The CTS input state is the logic 0
1b: The CTS input state is the logic 1
Reset to 0b.
5
DSR
RO
0b: The DSR input state is the logic 0
1b: The DSR input state is the logic 1
Reset to 0b.
6
RI
RO
The input state of RI pin
Reset to 0b.
7
DCD
RO
The input state of DCD pin
Reset to 0b.
7.1.10. SPECIAL FUNCTION REGISTER – OFFSET 07h
BIT
FUNCTION
TYPE
DESCRIPTION
0
Force Transmission
RW
Forces transmitter to always to transmit data.
1b: Enabled
0b: Disabled
Reset to 0b.
1
Auto DSR and
DTR Flow Control
RW
Auto DSR and DTR flow control enable
1b: Enables DSR and DTR auto flow control
0b: Disables DSR and DTR auto flow control
Reset to 0b.
2
Reserved
RO
Reset to 0b.
3
Reserved
RO
Reset to 0b.
4
Reserved
RW
Reset to 0b.
13-0093
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