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參數(shù)資料
| 型號(hào)： | BX80524R300128 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 300 MHz, MICROPROCESSOR, XMA |
| 封裝： | SINGLE EDGE PROCESSOR PACKAGE |
| 文件頁(yè)數(shù)： | 95/130頁(yè) |
| 文件大?。?/td> | 2654K |
| 代理商： | BX80524R300128 |
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Datasheet
67
Intel Celeron Processor up to 1.10 GHz
NOTES:
1. These values are specified at nominal VCCCORE for the processor pins.
2. Thermal Design Power (TDP) represents the maximum amount of power the thermal solution is required to
dissipate. The thermal solution should be designed to dissipate the TDP power without exceeding the
maximum Tcase specification.
3. TDP does not represent the power delivery and voltage regulation requirements for the processor. Refer to
Table 5 for voltage regulation and electrical specifications.
4. TCaseOffset is the worst-case difference between the maximum case temperature and the thermal diode
temperature on the processor’s core. For more information refer to the document, Intel Pentium III
Processor in the FC-PGA2 Package Thermal Design Guide.
5. This processor exists in both FC-PGA and FC-PGA2 packages.
Figure 17 is a block diagram of the Intel Celeron FC-PGA/FC-PGA2 processor die layout. The
layout differentiates the processor core from the cache die area. In effect, the thermal design power
identified in Table 40 is dissipated entirely from the processor core area. Thermal solution designs
should compensate for this smaller heat flux area and not assume that the power is uniformly
distributed across the entire die area.
1. For CPUID 0x68A, the die area is 0.94 cm2, the cache area is 0.30 cm2, and the core area is 0.64 cm2.
Table 41. Intel Celeron Processor for the FC-PGA2 Package Thermal Design Power 1
Processor
Processor Core
Frequency (MHz)
System Bus
Frequency (MHz)
Processor
Thermal Design
Power 2,3
CPUID 068Ah (W)
Maximum
Tcase
4 (°C)
Additional
Notes
900
100
30.0
72
5
950
100
32.0
72
5
1 GHz
1000
100
33.9
69
5
Figure 17. Processor Functional Die Layout (CPUID 0686h)(1)
Cache Area
0.04 in2
0.337”
0.275”
0.146”
0.414”
Core Area
0.10 in2
Die Area
0.14 in2
Die Area = 0.90 cm2
Cache Area = 0.26 cm2
Core Area = 0.64 cm2
Figure 18. Processor Functional Die Layout (up to CPUID 0683h)
Cache Area
0.05 in2
0.362”
0.292”
0.170”
0.448”
Core Area
0.11 in2
Die Area
0.16 in2
Die Area = 1.05 cm2
Cache Area = 0.32 cm2
Core Area = 0.73 cm2
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