參數(shù)資料
型號： BX80524R300128
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 300 MHz, MICROPROCESSOR, XMA
封裝： SINGLE EDGE PROCESSOR PACKAGE
文件頁數(shù)： 115/130頁
文件大?。?/td> 2654K
代理商： BX80524R300128
Datasheet
85
Intel Celeron Processor up to 1.10 GHz
E5
VCCCORE
Power/Other
E7
VSS
Power/Other
E9
VCCCORE
Power/Other
E11
VSS
Power/Other
E13
VCCCORE
Power/Other
E15
VSS
Power/Other
E17
VCCCORE
Power/Other
E19
VSS
Power/Other
E21
VCOREDET
Power/Other
E23
Reserved
Reserved for Future Use
E25
D62#
Power/Other
E27
Reserved
Reserved for Future Use
E29
Reserved
Reserved for Future Use
E31
Reserved
Reserved for Future Use
E33
VREF0
Power/Other
E35
BPM1#
AGTL+ I/O
E37
BP3#
AGTL+ I/O
F2
VCCCORE
Power/Other
F4
VCCCORE
Power/Other
F6
D32#
AGTL+ I/O
F8
D22#
AGTL+ I/O
F10
Reserved
Reserved for Future Use
F12
D27#
AGTL+ I/O
F14
VCCCORE
Power/Other
F16
D63#
AGTL+ I/O
F18
VREF1
Power/Other
F20
VSS
Power/Other
F22
VCCCORE
Power/Other
F24
VSS
Power/Other
F26
VCCCORE
Power/Other
F28
VSS
Power/Other
F30
VCCCORE
Power/Other
F32
VSS
Power/Other
F34
VCCCORE
Power/Other
F36
VSS
Power/Other
G1
D21#
AGTL+ I/O
G3
D23#
AGTL+ I/O
G5
VSS
Power/Other
Table 49. PPGA Package Signal Listing
by Pin Number
Pin
No.
Pin Name
Signal Buffer Type
G33
BP2#
AGTL+ I/O
G35
Reserved
Reserved for Future Use
G37
Reserved
Reserved for Future Use
H2
VSS
Power/Other
H4
D16#
AGTL+ I/O
H6
D19#
AGTL+ I/O
H32
VCCCORE
Power/Other
H34
VSS
Power/Other
H36
VCCCORE
Power/Other
J1
D7#
AGTL+ I/O
J3
D30#
AGTL+ I/O
J5
VCCCORE
Power/Other
J33
PICCLK
APIC Clock Input
J35
PICD0
APIC I/O
J37
PREQ#
CMOS Input
K2
VCCCORE
Power/Other
K4
VREF2
Power/Other
K6
D24#
AGTL+ I/O
K32
VCCCORE
Power/Other
K34
VCCCORE
Power/Other
K36
VSS
Power/Other
L1
D13#
AGTL+ I/O
L3
D20#
AGTL+ I/O
L5
VSS
Power/Other
L33
Reserved
Reserved for Future Use
L35
PICD1
APIC I/O
L37
LINT1/NMI
CMOS Input
M2
VSS
Power/Other
M4
D11#
AGTL+ I/O
M6
D3#
AGTL+ I/O
M32
VCCCORE
Power/Other
M34
VSS
Power/Other
M36
LINT0/INTR
CMOS Input
N1
D2#
AGTL+ I/O
N3
D14#
AGTL+ I/O
N5
VCCCORE
Power/Other
N33
Reserved
Reserved for Future Use
N35
Reserved
Reserved for Future Use
Table 49. PPGA Package Signal Listing
by Pin Number
Pin
No.
Pin Name
Signal Buffer Type
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