- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄201303 > BX80524R300128 (INTEL CORP) 32-BIT, 300 MHz, MICROPROCESSOR, XMA PDF資料下載
參數(shù)資料
| 型號： | BX80524R300128 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 300 MHz, MICROPROCESSOR, XMA |
| 封裝： | SINGLE EDGE PROCESSOR PACKAGE |
| 文件頁數(shù)： | 71/130頁 |
| 文件大?。?/td> | 2654K |
| 代理商： | BX80524R300128 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當(dāng)前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁
Datasheet
45
Intel Celeron Processor up to 1.10 GHz
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Celeron processors at all frequencies.
2. These specifications are tested during manufacturing.
3. All AC timings for the APIC I/O signals are referenced to the PICCLK rising edge at 1.25 V at the processor
pins. All APIC I/O signal timings are referenced at 0.75 V at the processor pins.
4. Referenced to PICCLK rising edge.
5. For open drain signals, valid delay is synonymous with float delay.
6. Valid delay timings for these signals are specified into 150
load pulled up to 1.5 V.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all Intel
Celeron
processor frequencies.
2. All AC timings for the TAP signals are referenced to the TCK rising edge at 0.70 V at the processor edge
fingers. All TAP signal timings (TMS, TDI, etc.) are referenced at 1.25 V at the processor edge fingers.
3. Not 100% tested. Specified by design characterization.
4. 1 ns can be added to the maximum TCK rise and fall times for every 1 MHz below 16.667 MHz.
5. Referenced to TCK rising edge.
6. Referenced to TCK falling edge.
7. Valid delay timing for this signal is specified to 2.5 V +5%.
8. Non-Test Outputs and Inputs are the normal output or input signals (besides TCK, TRST#, TDI, TDO, and
TMS). These timings correspond to the response of these signals due to TAP operations.
9. During Debug Port operation, use the normal specified timings rather than the TAP signal timings.
Table 24. System Bus AC Specifications (APIC Clock and APIC I/O)1, 2, 3
T# Parameter
Min
Max
Unit
Figure
Notes
T21: PICCLK Frequency
2.0
33.3
MHz
T22: PICCLK Period
30.0
500.0
ns
T23: PICCLK High Time
10.5
ns
@ > 1.7 V
T24: PICCLK Low Time
10.5
ns
@ < 0.7 V
T25: PICCLK Rise Time
0.25
3.0
ns
(0.7 V–1.7 V)
T26: PICCLK Fall Time
0.25
3.0
ns
(1.7 V–0.7 V)
T27: PICD[1:0] Setup Time
5.0
ns
4
T28: PICD[1:0] Hold Time
2.5
ns
4
T29a: PICD[1:0] Valid Delay (Rising Edge)
1.5
8.7
ns
4, 5, 6
T29b: PICD[1:0] Valid Delay (Falling Edge)
1.5
12.0
ns
4, 5, 6
Table 25. System Bus AC Specifications (TAP Connection) at the Processor Edge Fingers
(For S.E.P. Package)
T# Parameter
Min
Max
Unit
Figure
Notes
T30’: TCK Frequency
16.667
MHz
T31’: TCK Period
60.0
ns
T32’: TCK High Time
25.0
ns
@1.7 V
T33’: TCK Low Time
25.0
ns
@0.7 V
T34’: TCK Rise Time
5.0
ns
(0.7 V–1.7 V) 4
T35’: TCK Fall Time
5.0
ns
(1.7 V–0.7 V) 4
T36’: TRST# Pulse Width
40.0
ns
Asynchronous
T37’: TDI, TMS Setup Time
5.5
ns
5
T38’: TDI, TMS Hold Time
14.5
ns
5
T39’: TDO Valid Delay
2.0
13.5
ns
6, 7
T40’: TDO Float Delay
28.5
ns
6, 7
T41’: All Non-Test Outputs Valid Delay
2.0
27.5
ns
6, 8, 9
T42’: All Non-Test Inputs Setup Time
27.5
ns
6, 8, 9
T43’: All Non-Test Inputs Setup Time
5.5
ns
5, 8, 9
T44’: All Non-Test Inputs Hold Time
14.5
ns
5, 8, 9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BZV09/A0332/04 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BZV09/A0332/14 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BZV09/A0332/37 | 3A, 250VAC, FEMALE AND MALE, MAINS POWER CONNECTOR |
| BKT-146-01-F-V | 92 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| BKT-146-01-L-V | 92 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BX80524R30012A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| BX80524R33312A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| BX80525U500256E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| BX80525U533256EB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| BX80525U550256E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。