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參數(shù)資料
| 型號： | TSB82AA2I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1394b OHCI-LYNX CONTROLLER |
| 中文描述： | 的1394b OHCI的山貓控制器 |
| 文件頁數(shù)： | 84/104頁 |
| 文件大?。?/td> | 461K |
| 代理商： | TSB82AA2I |
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442
4.43 Isochronous Transmit Context Command Pointer Register
The isochronous transmit context command pointer register contains a pointer to the address of the first descriptor
block that the TSB82AA2 device accesses when software enables an isochronous transmit context by setting bit 15
(run) in the isochronous transmit context control register (see Section 4.42,
Isochronous Transmit Context Control
Register
) to 1. The isochronous transmit DMA context command pointer can be read when a context is active. The
n value in the following register addresses indicates the context number (n = 0, 1, 2, 3,
…
, 7).
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Isochronous transmit context command pointer
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Isochronous transmit context command pointer
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Register:
Type:
Offset:
Default:
Isochronous transmit context command pointer
Read-only
20Ch + (16 * n)
XXXX XXXXh
4.44 Isochronous Receive Context Control Register
The isochronous receive context control set/clear register controls options, state, and status for the isochronous
receive DMA contexts. The n value in the following register addresses indicates the context number (n = 0, 1, 2, 3).
See Table 435 for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Isochronous receive context control
Type
RSC
RSC
RSCU
RSC
RSC
R
R
R
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Isochronous receive context control
Type
RSCU
R
R
RSU
RU
RU
RU
R
RU
RU
RU
RU
RU
RU
RU
RU
Default
0
0
0
X
0
0
0
0
X
X
X
X
X
X
X
X
Register:
Type:
Offset:
Isochronous receive context control
Read/Set/Clear/Update, Read/Set/Clear, Read/Update, Read-only
400h + (32 * n)
set register
404h + (32 * n)
clear register
XX00 X0XXh
Table 435. Isochronous Receive Context Control Register Description
Default:
BIT
FIELD NAME
TYPE
DESCRIPTION
31
bufferFill
RSC
When bit 31 is set to 1, received packets are placed back-to-back to completely fill each receive
buffer. When this bit is cleared, each received packet is placed in a single buffer. If bit 28
(multiChanMode) is set to 1, then this bit must also be set to 1. The value of this bit must not be
changed while bit 10 (active) or bit 15 (run) is set to 1.
30
isochHeader
RSC
When bit 30 is set to 1, received isochronous packets include the complete 4-byte isochronous
packet header seen by the link layer. The end of the packet is marked with xferStatus in the first
doublet, and a 16-bit timeStamp indicating the time of the most recently received (or sent) cycleStart
packet.
When this bit is cleared, the packet header is stripped from received isochronous packets. The
packet header, if received, immediately precedes the packet payload. The value of this bit must not
be changed while bit 10 (active) or bit 15 (run) is set to 1.
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| TSB82AA2IPGE | 功能描述:接口 - 專用 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| TSB82AA2IPGEEP | 功能描述:1394 接口集成電路 Mil Enh 1394b OHCI- Lynx Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2PGE | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2PGEG4 | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2ZGW | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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