參數(shù)資料
型號(hào)： TSB82AA2I
廠商： Texas Instruments, Inc.
英文描述： 1394b OHCI-LYNX CONTROLLER
中文描述： 的1394b OHCI的山貓控制器
文件頁(yè)數(shù)： 28/104頁(yè)
文件大小： 461K
代理商： TSB82AA2I
38
3.8
Header Type and BIST Register
The header type and built-in self-test (BIST) register indicates the TSB82AA2 PCI header type, and indicates no
built-in self test. See Table 37 for a complete description of the register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Header type and BIST
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
Header type and BIST
Read-only
0Eh
0000h
Table 37. Header Type and BIST Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
158
BIST
R
Built-in self test. The TSB82AA2 device does not include a BIST; therefore, this field returns 00h when
read.
70
HEADER_TYPE
R
PCI header type. The TSB82AA2 device includes the standard PCI header, which is communicated by
returning 00h when this field is read.
3.9
OHCI Base Address Register
The OHCI base address register is programmed with a base address referencing the memory-mapped OHCI control.
When BIOS writes all 1s to this register, the value read back is FFFF F800h, indicating that at least 2K bytes of
memory address space are required for the OHCI registers. See Table 38 for a complete description of the register
contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
OHCI base address
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
OHCI address
Type
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
OHCI base address
Read/Write, Read-only
10h
0000 0000h
Table 38. OHCI Base Address Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
3111
OHCIREG_PTR
R/W
OHCI register pointer. This field specifies the upper 21 bits of the 32-bit OHCI base address register.
104
OHCI_SZ
R
OHCI register size. This field returns 0s when read, indicating that the OHCI registers require a
2K-byte region of memory.
3
OHCI_PF
R
OHCI register prefetch. Bit 3 returns 0 when read, indicating that the OHCI registers are
nonprefetchable.
21
OHCI_MEMTYPE
R
OHCI memory type. This field returns 0s when read, indicating that the OHCI base address register is
32 bits wide and mapping can be done anywhere in the 32-bit memory space.
0
OHCI_MEM
R
OHCI memory indicator. Bit 0 returns 0 when read, indicating that the OHCI registers are mapped into
system memory space.
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