- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383967 > TSB82AA2I (Texas Instruments, Inc.) 1394b OHCI-LYNX CONTROLLER PDF資料下載
參數(shù)資料
| 型號： | TSB82AA2I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1394b OHCI-LYNX CONTROLLER |
| 中文描述： | 的1394b OHCI的山貓控制器 |
| 文件頁數(shù)： | 19/104頁 |
| 文件大?。?/td> | 461K |
| 代理商： | TSB82AA2I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁
27
Table 26. PCI 64-Bit Bus Extension Terminals
TERMINAL
I/O
DESCRIPTION
NAME
NO.
PCI_ACK64
72
I
PCI bus 64-bit transfer acknowledge. Asserted by a target if it is willing to accept a 64-bit data transfer when
it positively decodes its address for a memory transaction and the master has requested a 64-bit data transfer
by asserting PCI_REQ64. PCI_REQ64 has identical timing to PCI_DEVSEL. When the TSB82AA2 device is
bus master, it monitors PCI_REQ64 when it has requested a 64-bit data transfer for the current transaction.
If the target asserts PCI_REQ64 when it claims the cycle, then the TSB82AA2 device transfers data using
64 bits. As a target, the TSB82AA2 does not support 64-bit data transfers and never asserts PCI_REQ64 when
another master has requested 64-bit transfer.
PCI_AD63
PCI_AD62
PCI_AD61
PCI_AD60
PCI_AD59
PCI_AD58
PCI_AD57
PCI_AD56
PCI_AD55
PCI_AD54
PCI_AD53
PCI_AD52
PCI_AD51
PCI_AD50
PCI_AD49
PCI_AD48
PCI_AD47
PCI_AD46
PCI_AD45
PCI_AD44
PCI_AD43
PCI_AD42
PCI_AD41
PCI_AD40
PCI_AD39
PCI_AD38
PCI_AD37
PCI_AD36
PCI_AD35
PCI_AD34
PCI_AD33
PCI_AD32
82
83
84
85
88
89
90
92
94
95
96
97
98
99
100
101
104
105
106
107
108
109
110
111
113
114
115
116
118
119
120
121
I/O
PCI address/data bus for the upper DWORD. These signals make up the multiplexed PCI address and data
bus for the upper 32 bits of the PCI interface. During the address phase of a dual address command with
PCI_REQ64 asserted, AD63AD32 contain the upper 32 bits of a 64-bit address. During the data phase,
AD63AD32 contain data when a 64-bit transfer has been negotiated by the assertion of PCI_REQ64 by the
master and PCI_ACK64 by the target. Note, the TSB82AA2 does not support the dual address command.
PCI_C/BE7
PCI_C/BE6
PCI_C/BE5
PCI_C/BE4
74
77
78
79
I/O
PCI bus commands and byte enables for the upper DWORD. During the address phase of a bus cycle,
PCI_C/BE7PCI_C/BE4 are reserved and indeterminate since the TSB82AA2 does not support the dual
address command. During the data phase, this 4-bit bus is used as byte enables for the upper 32 bits when
a 64-bit transfer has been negotiated by the assertion of PCI_REQ64 by the master and PCI_ACK64 by the
target.
PCI_PAR64
80
I
PCI parity for the upper DWORD. In all PCI bus read and write cycles, the TSB82AA2 device calculates even
parity across the PCI_AD63PCI_AD32 and PCI_C/BE4PCI_C/BE7 buses. As an initiator during PCI cycles,
the TSB82AA2 device outputs this parity indicator with a one-PCI_CLK delay. As a target during PCI cycles,
the calculated parity is compared to the initiator parity indicator; a miscompare can result in a parity error
assertion (PCI_PERR).
PCI_REQ64
73
I
PCI bus request for 64-bit transfer. Asserted by a bus master to request a 64-bit transfer for a memory
transaction. The timing of PCI_REQ64 is identical to PCI_FRAME. When the TSB82AA2 device is the bus
master, it asserts PCI_REQ64 to request a 64-bit transfer on the current transaction. The TSB82AA2 device
only requests a 64-bit transfer for a memory transaction. The target asserts PCI_ACK64 if it is willing to transfer
data using 64 bits.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSC2200EVM | TSC2200 Touch Screen Controller Evaluation Module(TSC2200觸摸屏控制器評估模塊) |
| TSC427CBA | Dual Power MOSFET Drivers |
| TSC427CPA | Dual Power MOSFET Drivers |
| TSC428CBA | Dual Power MOSFET Drivers |
| TSC426CBA | Dual Power MOSFET Drivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB82AA2IPGE | 功能描述:接口 - 專用 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| TSB82AA2IPGEEP | 功能描述:1394 接口集成電路 Mil Enh 1394b OHCI- Lynx Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2PGE | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2PGEG4 | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB82AA2ZGW | 功能描述:1394 接口集成電路 OHCI-Lynx Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。