參數(shù)資料
型號: TMP90C051
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed CMOS 8-bit Microcontroller,Integrating DMA, DRAM Controller,Serial Interface, Timer/Event Counter(高速 CMOS 8位微控制器(芯片集成了DMA,DRAM控制器,串行接口,定時器/事件計數(shù)器))
中文描述: 高速CMOS 8位微控制器,集成的DMA,DRAM控制器,串行接口,定時器/事件計數(shù)器(高速的CMOS 8位微控制器(DMA的芯片集成了,內(nèi)存控制器,串行接口,定時器/事件計數(shù)器))
文件頁數(shù): 156/158頁
文件大?。?/td> 4573K
代理商: TMP90C051
156/184
TOSHIBA CORPORATION
TMP90C051
Iv)
Register Setting Method
Figure 3.12 (11) and Figure 3.12 (12) show the bit con-
figurations of the start address register (MSAR) and
start address mask register (MSAMR).
MSAR is assigned to address FFD9H and MSAMR is
assigned to address FFDAH.
CS output can be enabled and disabled regardless of
the above registers by setting <CSEN> of the memory
access control register (MACR) shown in Figure 3.12
(6).
Figure 3.12 (11). Memory Start Address Mask Register
The MSAR <S22> ~ <S15> correspond to the A22 ~
A15 of address and the S14 correspond to the A14
(S14 is “0” at default). The MSAMR <V21> ~ <V14>
point to the validness/invalidity of comparison with the
value of the setting MSAR and the address.
The MSAMR <V21> ~ <V14> correspond to the
MSAMR <V21> ~ <V15>, S14 and the MSAMR
<V22> corresponds to the MSAR <S22> (S22 is “0” at
default). The comparison of the A22 and <S22> is
usually validness. The meaning of comparison (valid-
ness and invalidity).
EX.
The case of invalidity at <V15> = 1
The comparison of <S15> value and address (A15) is
invalidity and <S15> value is validity. So the value of
A15 is unrelated ness for “0”/“1”.
The case of validness at <V15> = 0
The comparison of <S15> value and address (A15) is
validness.
When the value of <S15> only agree with address
(A15), CS signal is enabled.
相關(guān)PDF資料
PDF描述
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