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參數(shù)資料
| 型號： | TMP90C051 |
| 廠商： | Toshiba Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | High Speed CMOS 8-bit Microcontroller,Integrating DMA, DRAM Controller,Serial Interface, Timer/Event Counter(高速 CMOS 8位微控制器（芯片集成了DMA,DRAM控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
| 中文描述： | 高速CMOS 8位微控制器，集成的DMA，DRAM控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器（高速的CMOS 8位微控制器（DMA的芯片集成了，內(nèi)存控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器）） |
| 文件頁數(shù)： | 107/158頁 |
| 文件大?。?/td> | 4573K |
| 代理商： | TMP90C051 |
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TOSHIBA CORPORATION
107/184
TMP90C051
Transmission buffer
The transmission buffer SCBUF shifts out the data
written by the CPU from the LSB as based on the shift
clock TXDSFT (same period as TXDCLK) generated by
the transmission control unit. When all bits are shifted
out, the transmission buffer becomes empty, generating
the interrupt INTTX.
Parity control circuit
Setting the serial channel control register SCCR <PE>
to “1” allows the addition of a parity bit in transmitting/
receiving data, only in the 7-bit UART or 8-bit UART
mode. Either even or odd parity can be selected by the
SCCR <EVEN> register.
In the transmission mode, the parity is automatically
generated as based on the data written into the trans-
mission buffer SCBUF, storing into the SCBUF <TB7>
in the 7-bit UART mode or into <TB8> in the 8-bit
UART mode for transmission. <PE> and <EVEN>
should be designated before writing data into the
transmission buffer.
In the receiving mode, the receiving data is shifted into
the receiving buffer 1 and transferred to the receiving
buffer 2 (SUBUF). The parity is generated from the
data in the receiving buffer 2. A parity error is detected
and the SCCR <PERR> flag is set if the parity status
mismatches the SCBUF <RB7> in the 7-bit UART
mode or <RB8> in the 8-bit UART mode.
Error flag
There error flags are prepared to increase the reliability
of received data.
1) Overrun error (SCCR0 <OERR0>)
Overrun error occurs if all the bits of the next data are
received by the receiving buffer 1 while valid data are
still stored in the receiving buffer 2 (SCBUF).
2) Parity error (SCCR0 <PERR0>)
The parity generated from the data that is transferred
to the receiving buffer 2 (SCBUF0) is compared with
the parity bit received from the RxD terminal. Parity
error occurs if they are not equal.
3) Framing error (SCCR0 <FERR0>)
The stop bit of received data is sampled three times
around the center. If a majority results in zero, framing
error occurs.
11
Generation Timing
1) UART mode
Note:
Therefore, to check for framing error during interrupt operation, an addition
operation, such as waiting for 1 bit time, becomes necessary.
The occurrence of a framing error is delayed until after interruption.
2) I/O interface mode
Receiving
Mode
9 Bit
8 Bit + Parity
8 Bit, 7 Bit + Parity,
7 Bit
Interrupt timing
Center of last bit
(Bit 8)
Center of last bit
(Parity Bit)
Center of Stop bit
Framing error
timing
Center of stop bit
Center of stop bit
↑
Parity error timing
Center of last bit
(Bit 8)
Center of last bit
(Parity Bit)
↑
Over-run error
timing
Center of last bit
(Bit 8)
Center of last bit
(Parity Bit)
↑
Transmitting
Mode
9-bit
8-bit + Parity
8-bit, 7-bit + Parity,
7-bit
Interrupt timing
Just before the
stop bit
←
←
Receiving
Interrupt timing of receiving
Just after the last SCLK rising
Interrupt timing of transmitting
↑
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMP90C141 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D Converter,General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位A/D轉(zhuǎn)換器,通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C400 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C401 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C800 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C801 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMP90C051F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C141 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TMP90C141F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C141N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C400 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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