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參數(shù)資料
| 型號(hào)： | TMP90C051 |
| 廠商： | Toshiba Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | High Speed CMOS 8-bit Microcontroller,Integrating DMA, DRAM Controller,Serial Interface, Timer/Event Counter(高速 CMOS 8位微控制器（芯片集成了DMA,DRAM控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
| 中文描述： | 高速CMOS 8位微控制器，集成的DMA，DRAM控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器（高速的CMOS 8位微控制器（DMA的芯片集成了，內(nèi)存控制器，串行接口，定時(shí)器/事件計(jì)數(shù)器）） |
| 文件頁(yè)數(shù)： | 105/158頁(yè) |
| 文件大小： | 4573K |
| 代理商： | TMP90C051 |
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TOSHIBA CORPORATION
105/184
TMP90C051
Receive buffers
The receive buffers have a redundant construction to
prevent overruns. Receive data are stored 1 bit at a
time to receive buffer 1 (shift register type). When 7 or
8 bits of data have been stored, the are shifted to the
other receive buffer (SCBUF0) and interrupt INTRX is
generated. The CPU reads receive buffer 2 (SCBUF0).
The next receive data can be stored to receive buffer 1
even before the CPU reads receive buffer 2 (SCBUF0).
However an overrun error will occur unless receive
buffer 2 (SCBUF0) is read before all bits of the next
data have been received by receive buffer 1. If an overrun
error occurs, the contents of receive buffer 2 and
RB08 are held but the contents of receive buffer 1 are
lost.
In the case of 8-bit UART with parity, the parity bit is
stored to SCCR07 (RB08). In the case of 9-bit UART,
the uppermost bit is stored to SCCR0 <RB08>.
In the case of 9-bit UART, wake-up operation of the
slave controller can be enabled by setting SCMOD0
<WU0> to “1”. After that, interrupt INTRX will be gener-
ated only when RB08 = 1.
Transmit counter
The transmit counter is a 4-bit binary counter used in
the asynchronous communication (UART) mode and,
like the receive counter, is counted up by SIOCLK. The
transmit clock TXDCLK is generated every 16 clocks.
Transmit control block
1) Input/output interface mode
In the SCCR0 <IOC0> = “0” SCLK0 output mode, the
transmit buffer data are output to the TxD0 pin one bit
at a time at the rise of the shift clock output to the
SCLK0 pin.
In the SCCR0 <IOC0> = “1” SCLK0 input mode, the
transmit buffer data are output to the TxD0 pin one bit
at a time at the rise/fall of the SCLK0 input in accordance
with the setting of the SCCR01(SCLK0) register.
2) Asynchronous communication (UART) mode
When the CPU writes transmit data to the transmit
buffer, transmitting starts from the next TxDCLK rise
edge to make the transmit shift clock TxDSFT.
Hand-shake function
The TMP90C051F supports a hand-shake function by
the connection of CTS0 and RTS0 of the other
TMP90C051F.
The hand-shake function allows receiving/transmitting
data on a frame basis to prevent overrun errors. This
function is enabled or disabled by the control register
SCMOD0 <CTSE0>.
When the last bit (parity bit or MSB) of 1-frame data is
received by the receiving unit, the RTS0 pin turns to
the “H” level to request the transmission unit to halt
transmission.
When the CTS0 pin turned to the “H” level, the trans-
mission unit halts transmission, after completing the
current data transmission, until the pin turns to the “L”
level. At this time, the interrupt INTTX is generated, to
request the CPU to transfer data. Then the data is writ-
ten into the transmission buffer, and the transmission
unit is placed in the standby until the CTS0 pin turned
to the “L” level.
When the received data are read by the CPU, the
RTS0 pin returns to the “L” level, requesting that the
transmission is restarted.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMP90C141 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit A/D Converter,General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位A/D轉(zhuǎn)換器,通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C400 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C401 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C800 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
| TMP90C801 | High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時(shí)器/事件計(jì)數(shù)器）) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMP90C051F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C141 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TMP90C141F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C141N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TMP90C400 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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